Texas Instruments CD74ACT652M96
- Part No.:
- CD74ACT652M96
- Manufacturer:
- Texas Instruments
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
CD74ACT652M96.pdf
- Description:
- IC TXRX NON-INVERT 5.5V 24SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,032
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Product details
Overview
CD74ACT652M96 from Texas Instruments is a high-speed 8-bit bus transceiver with 3-state outputs and non-inverting data flow, fabricated in ACT (Advanced CMOS TTL-compatible) logic technology. It operates from 4.5V to 5.5V, supports -55°C to +125°C temperature range, features 24-pin SOIC (DW) package, and is used in bidirectional data bus isolation and level translation between microcontrollers and peripheral ICs.
For engineers reviewing the CD74ACT652M96 datasheet, CD74ACT652M96 pinout, CD74ACT652M96 application, or CD74ACT652M96 equivalent, key selection considerations include its TTL-compatible input thresholds, 3-state enable timing, propagation delay (typ. 8.5 ns), output drive capability (±24 mA), and compatibility with legacy 74ACT/74LS systems in industrial control backplanes.
Technical Context
This device integrates two independent 4-bit transceivers in one 24-pin SOIC package, each with separate transmit/receive direction control (DIR) and output-enable (OE) inputs. Its ACT logic family ensures compatible voltage thresholds with TTL while delivering CMOS power efficiency and noise immunity.
The CD74ACT652M96 implements true bidirectional data transfer without internal latching - data flows transparently when enabled, with propagation delays matched between A→B and B→A paths (max 11 ns). Input hysteresis and guaranteed 1.0V minimum VIH ensure robust operation in noisy industrial environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | 74ACT - TTL-compatible input thresholds (VIH = 2.0V min), CMOS output drive |
| Supply Voltage | 4.5V to 5.5V - supports standard 5V systems with ±10% tolerance |
| Propagation Delay | 8.5 ns typical (VCC = 5V, TA = 25°C) - enables >80 MHz bus operation |
| Output Drive | ±24 mA (IOH/IOL) - drives 15-pF loads with <10 ns rise/fall times |
| Operating Temp | -55°C to +125°C - qualified for extended industrial and aerospace applications |
| Input Hysteresis | ≈0.3V - improves noise margin on control lines (DIR/OE) |
| 3-State Leakage | ±10 μA max - prevents bus contention during disable |
Pinout & Package
CD74ACT652M96 is housed in a 24-pin SOIC (DW) package with 300-mil body width, gull-wing leads, and RoHS-compliant NiPdAu (NIPDAU) finish. MSL Level-1 rating allows unlimited floor life at ≤30°C/60% RH.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A7 | Data inputs/outputs (Port A) | Bidirectional I/O pins for first 8-bit bus segment; high-impedance when OE low |
| B0–B7 | Data inputs/outputs (Port B) | Bidirectional I/O pins for second 8-bit bus segment; isolated from A when DIR/OE inactive |
| DIR | Direction control input | High = A→B transfer; Low = B→A transfer; hysteresis improves noise immunity |
| OE | Output enable input | Active-low; disables both ports into high-Z state; asynchronous to DIR |
| VCC, GND | Power supply terminals | Single 5V supply; requires local 0.1 μF ceramic decoupling per VCC pin |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible inputs | VIH = 2.0V min, VIL = 0.8V max - interoperable with 74LS, 74F, and microcontroller GPIOs |
| Matched A↔B propagation | tPLH/tPHL ≤ 11 ns (max) both directions - ensures deterministic bus timing in full-duplex mode |
| High noise immunity | Input hysteresis ≈0.3V + 100 mV noise margin - suppresses glitches on DIR/OE in EMI-prone environments |
| Low power consumption | ICC = 4 μA max (standby), 16 mA typical (switching at 10 MHz) - reduces thermal load in dense PCB layouts |
| Robust 3-state control | Simultaneous OE assertion forces both ports to high-Z before DIR changes - eliminates bus contention during direction switching |
Applications
| Industrial Backplane Interface | Legacy System Bus Extender |
|---|---|
Use Scenario: Isolating CPU address/data buses from modular I/O cards in programmable logic controllers. IC Role / Device Role / Timing Role: Bidirectional bus transceiver enabling hot-swap-capable slot communication with direction-controlled data routing. Use Value: ±24 mA drive sustains signal integrity across 15-cm backplane traces; -55°C to +125°C rating ensures reliability in uncooled enclosures. | Use Scenario: Interfacing modern microcontrollers to vintage 74LS-based peripheral boards in test equipment upgrades. IC Role / Device Role / Timing Role: Logic-level translator and bus driver maintaining TTL-compatible timing while reducing power vs. original LS parts. Use Value: 8.5 ns typical tPD matches 74LS652 performance; ACT family draws <10% of LS quiescent current. |
| Avionics Data Concentrator | Automated Test Equipment (ATE) Fixture |
Use Scenario: Aggregating sensor data from multiple ARINC 429 receivers onto a central processing bus in flight control units. IC Role / Device Role / Timing Role: High-reliability bidirectional buffer managing time-critical status updates between isolated subsystems. Use Value: Extended temperature qualification (-55°C to +125°C) and MSL-1 reflow compatibility meet DO-160 environmental requirements. | Use Scenario: Switching DUT (device under test) signal paths between stimulus sources and measurement instruments in production test racks. IC Role / Device Role / Timing Role: Programmable bus isolator controlled by FPGA GPIOs to configure test topology on-the-fly. Use Value: Independent DIR/OE control enables glitch-free path reconfiguration; ±10 μA 3-state leakage prevents signal corruption during switching. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional bus transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74ACT652N | Dual-in-line (PDIP-24) package; same AC/ACT electrical specs; no tape-and-reel option | Suitable for prototyping and through-hole assembly; lacks MSL-1 qualification and RoHS-compliant finish | Select when manual soldering or breadboarding is required; not recommended for automated SMT production. |
| CD74AC652M96 | AC-family variant: higher VIH (3.15V min), lower drive (±24 mA still valid), identical pinout and timing | Better suited for mixed-voltage systems where upstream logic uses 3.3V LVTTL but downstream loads require 5V swing | Choose when interfacing with 3.3V controllers driving 5V peripherals; retains full pin compatibility with CD74ACT652M96. |
Compared with SN74ACT652N and CD74AC652M96, the CD74ACT652M96 uniquely combines SMT-ready SOIC packaging, MSL-1 reflow compliance, NIPDAU finish, and TTL-compatible input thresholds optimized for legacy 5V system integration - making it the preferred choice for volume industrial manufacturing.
Availability
CD74ACT652M96 is available at Aetrix Electronics and suitable for industrial backplane interfaces, avionics data concentrators, and automated test equipment fixtures requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CD74ACT652M96 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in industrial, automotive, and aerospace electronics.
The CD74ACT652M96 belongs to TI's legacy 74ACT logic family, designed specifically for high-reliability, 5V TTL-compatible digital interface applications in harsh-environment systems where timing predictability and noise immunity are critical.
FAQ
What is the maximum clock frequency supported by CD74ACT652M96 in bidirectional bus applications?
The CD74ACT652M96 does not operate on a clock signal - it is an asynchronous transceiver. Its usable data rate depends on propagation delay (8.5 ns typical) and system setup/hold timing. With matched A↔B delays ≤11 ns, it reliably supports sustained bus toggling up to 80 MHz in well-terminated 5V systems, assuming proper PCB layout and load capacitance ≤15 pF.
Does CD74ACT652M96 support mixed-voltage operation between 3.3V and 5V domains?
CD74ACT652M96 operates exclusively from a single 4.5V–5.5V supply and has TTL-compatible inputs (VIH = 2.0V min), so it can accept 3.3V logic-high signals directly. However, its outputs swing rail-to-rail at 5V, making it suitable as a 3.3V-to-5V translator only when driven by 3.3V sources - it cannot be powered from 3.3V or drive 3.3V-only inputs safely.
Is CD74ACT652M96 pin-compatible with the older CD74LS652?
Yes, CD74ACT652M96 is pin-compatible and functionally equivalent to CD74LS652, sharing identical 24-pin SOIC (DW) footprint, pin assignments, and truth table behavior. Key improvements include lower power consumption, faster propagation (8.5 ns vs. 20 ns), and enhanced noise immunity via input hysteresis - all while maintaining full drop-in replacement capability in existing LS-based designs.
What is the meaning of "ACT652M" marking on the CD74ACT652M96 package?
The top-side marking "ACT652M" on the CD74ACT652M96 identifies the logic family (ACT), function (652 transceiver), and package type (M = SOIC). This marking is standardized across TI's 74ACT series and distinguishes it from AC-series variants (e.g., "AC652M"). The full orderable part number CD74ACT652M96 appears only in documentation and ordering systems.
How does the DIR and OE interaction affect bus contention risk in CD74ACT652M96?
In CD74ACT652M96, OE is asynchronous and overrides DIR: when OE is asserted (low), both ports enter high-impedance regardless of DIR state, eliminating bus contention. During direction changes, designers must ensure OE remains active until DIR stabilizes - the device's robust 3-state control and ±10 μA leakage guarantee no DC path between A and B ports during transitions.
CD74ACT652M96 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74ACT
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Transceiver, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
CD74ACT652M96 FAQ
1.How can I place an order for CD74ACT652M96 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74ACT652M96 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74ACT652M96 reliable?
The price and inventory of CD74ACT652M96 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74ACT652M96 is usually 5 days.
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Once your CD74ACT652M96 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74ACT652M96?
For technical support, including CD74ACT652M96 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74ACT652M96 requirements.
6.How does Aetrix verify that CD74ACT652M96 is sourced from the original manufacturer or authorized distributors?
All CD74ACT652M96 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74ACT652M96 meets industry standards.
7.What is the process for return or replacement of CD74ACT652M96?
All CD74ACT652M96 units undergo pre-shipment inspection (PSI). If there is an issue with CD74ACT652M96, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74ACT652M96 part is unused and in its original packaging.
Return procedure for CD74ACT652M96:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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