Texas Instruments CD74HC123MT

Overview

CD74HC123MT from Texas Instruments is a dual retriggerable monostable multivibrator with independent resets, designed for precise pulse generation and timing control in digital systems. It operates from 2V to 6V, features Schmitt-trigger inputs on both A and B trigger pins, supports output pulse widths from nanoseconds to milliseconds via external RX/CX, and delivers buffered Q and Q̅ outputs. It is used in debounce circuits, event timing, and programmable delay generators in industrial control and test equipment.

For engineers reviewing the CD74HC123MT datasheet, CD74HC123MT pinout, CD74HC123MT application, or CD74HC123MT equivalent, key selection criteria include retriggerable operation, edge-selective triggering (A = trailing, B = leading), reset-override capability, wide temperature range (–55°C to +125°C), and SOIC-16 package compatibility with legacy HC logic families.

Technical Context

The CD74HC123MT implements two independent monostable multivibrators, each with separate A (trailing-edge), B (leading-edge), and R (active-low reset) inputs. Pulse width t_W = 0.45 × R_XC_X at V_CC = 5V, enabling predictable timing across voltage and temperature. Its Schmitt-trigger inputs provide noise immunity and eliminate sensitivity to input rise/fall times.

Each monostable supports retriggering during an active output pulse - extending t_W - and immediate termination via low-level assertion on R. Unused inputs must be tied high or low; minimum R_X = 5 kΩ and C_X = 0 pF allow sub-microsecond to multi-second timing ranges.

Key Specifications

Pinout & Package

CD74HC123MT is housed in a 16-pin SOIC (Small Outline Integrated Circuit) package, 7.5 mm wide, with standard 1.27 mm pitch and JEDEC MS-012AC compliant footprint. Thermal resistance θ_JA = 73°C/W enables reliable operation in compact PCB layouts without forced airflow.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with CD74HC423MT and SN74LV123ADR, the CD74HC123MT uniquely balances retriggerability, noise-immune Schmitt inputs, and wide V_CC/temperature operation - making it optimal for robust, field-deployable timing in mixed-signal industrial designs.

Availability

CD74HC123MT is available at Aetrix Electronics and suitable for industrial control systems, test instrumentation, and automotive body electronics requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for CD74HC123MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The CD74HC123MT belongs to TI's legacy HC logic family, engineered for pin-compatible upgrade paths from TTL and robust operation in harsh environments with minimal design overhead.

FAQ

What is the minimum external timing capacitor value supported by CD74HC123MT?

The CD74HC123MT supports C_X = 0 pF as the minimum external timing capacitor value. This allows the device to generate minimum pulse widths determined solely by internal propagation delays and R_X, enabling sub-microsecond timing when paired with R_X ≥ 5 kΩ. At V_CC = 5V, typical t_W with C_X = 0 and R_X = 5 kΩ is ~2.25 µs per the t_W = 0.45 × R_XC_X formula.

Can CD74HC123MT operate reliably at 3.3V supply voltage?

Yes, CD74HC123MT operates reliably across 2V to 6V, including 3.3V nominal systems. At V_CC = 3.3V, VIH = 2.31V (min), VIL = 1.0V (max), and output drive remains sufficient for 10 LSTTL loads. Propagation delay increases to ~90 ns (max) versus 64 ns at 4.5V, but all timing parameters remain fully specified and guaranteed over –55°C to +125°C.

How does the reset function interact with an active output pulse in CD74HC123MT?

In CD74HC123MT, asserting the active-low reset (R) input forces Q low and Q̅ high *immediately*, terminating the current output pulse regardless of its remaining duration or retrigger activity. This override is asynchronous and does not require synchronization with the trigger edge - ensuring deterministic, worst-case response time of ≤90 ns (max) at V_CC = 4.5V.

Is CD74HC123MT pin-compatible with CD74HC423MT?

No, CD74HC123MT and CD74HC423MT share identical pinout and package (SOIC-16), but differ functionally: CD74HC123MT is retriggerable while CD74HC423MT is non-retriggerable. Swapping them requires logic redesign to prevent unintended pulse extension. Both support same V_CC, timing equations, and input thresholds - but their truth tables and internal state machines are not interchangeable.

What is the recommended PCB layout practice for the timing components of CD74HC123MT?

For stable CD74HC123MT timing, route R_X and C_X connections directly to pins 13/14 (1RXCX/1CX) and 3/4 (2RXCX/2CX) with minimal trace length. Place C_X as close as possible to the IC - ideally within 2 mm - and use NP0/C0G ceramic capacitors for temperature stability. Avoid routing R_X/C_X near noisy signals or switching regulators to prevent injection of jitter into the timing node.