Texas Instruments CD74HC125M
- Part No.:
- CD74HC125M
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74HC125M.pdf
- Description:
- IC BUFFER NON-INVERT 6V 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,365
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD74HC125M from Texas Instruments is a quadruple non-inverting buffer with 3-state outputs, designed for digital bus interface and signal enable functions in industrial and automotive systems. It operates across 2 V to 6 V supply voltage, supports –55°C to +125°C ambient temperature, delivers propagation delay as low as 17 ns at 6 V, and drives up to 10 LSTTL loads.
For engineers reviewing the CD74HC125M datasheet, CD74HC125M pinout, CD74HC125M application, or CD74HC125M equivalent, key selection criteria include 3-state output control timing (enable/disable delays ≤32 ns), wide-voltage rail compatibility, SOIC-14 thermal performance (RθJA = 133.6°C/W), and guaranteed operation over extended temperature range.
Technical Context
This device implements four independent positive-logic buffers (Y = A) with active-low 3-state enable inputs per channel. Each output transitions between driven HIGH/LOW states and high-impedance (Z) state based on OE control, enabling bidirectional bus isolation without external logic.
It uses standard CMOS input structure with 10 pF input capacitance and balanced CMOS 3-state outputs capable of ±35 mA continuous output current. The SOIC-14 package supports surface-mount assembly with NIPDAU lead finish and MSL Level-1 reflow profile.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2 V to 6 V - enables direct interfacing with 3.3 V and 5 V logic families without level shifters |
| Operating Temperature | –55°C to +125°C - qualified for under-hood automotive and industrial control environments |
| Propagation Delay | 17 ns max at 6 V - ensures sub-60 MHz data throughput in synchronous bus applications |
| Output Drive | ±35 mA per output - sufficient to drive multiple CMOS inputs or light capacitive loads (≤70 pF) |
| Input Capacitance | 10 pF - minimizes loading on upstream drivers and preserves signal edge integrity |
| 3-State Leakage | ±10 µA max - maintains stable bus voltage during high-Z state without excessive pull-up/down current |
| Power Dissipation Cap. | 29 pF per gate - used to calculate dynamic power consumption in high-frequency switching |
Pinout & Package
CD74HC125M is housed in a 14-pin SOIC (D) package measuring 8.70 mm × 3.90 mm, with gull-wing leads and RoHS-compliant NIPDAU plating. Thermal resistance is RθJA = 133.6°C/W, requiring minimal heatsinking in typical PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 (OE) | Active-low output enable | Controls 3-state mode per channel; LOW enables output, HIGH forces high-impedance |
| 2, 5, 9, 12 (A) | Buffer input | Accepts TTL- or CMOS-level signals; 10 pF input capacitance limits high-frequency loading |
| 3, 6, 8, 11 (Y) | Buffered 3-state output | Drives downstream logic or bus lines; sinks/sources up to ±35 mA while maintaining VOL ≤0.4 V / VOH ≥3.7 V |
| 7 (GND) | Ground reference | Return path for all I/O and supply currents; must be low-impedance to minimize noise coupling |
| 14 (VCC) | Positive supply | Single rail powering all four buffers; requires local 0.1 µF bypass capacitor near pin |
Key Features
| Feature | Design Value |
|---|---|
| Quadruple 3-state buffer architecture | Enables independent control of four data paths - ideal for 4-bit parallel bus gating or selective signal routing |
| Wide supply voltage range (2–6 V) | Eliminates need for separate voltage translators when interfacing mixed-voltage subsystems |
| Extended temperature operation (–55°C to +125°C) | Supports deployment in engine control units, motor drives, and outdoor industrial controllers |
| Balanced CMOS output drive | Sinks and sources comparable current - ensures symmetrical rise/fall times and reduces ground bounce |
| Low input leakage (±1 µA max) | Permits high-impedance input termination with 10 kΩ resistors without significant DC error |
Applications
| Industrial Bus Isolation | Automotive Sensor Interface |
|---|---|
Use Scenario: Isolating microcontroller GPIOs from noisy PLC backplane buses during firmware updates. IC Role / Device Role / Timing Role: CD74HC125M acts as a controlled signal gate, enabling/disabling data flow via dedicated OE lines synchronized to system reset sequence. Use Value: Prevents bus contention and spurious writes during reconfiguration; 3-state leakage <10 µA avoids unintended pull-up effects on shared lines. | Use Scenario: Conditioning analog sensor outputs (e.g., pressure transducers) before ADC sampling in engine management systems. IC Role / Device Role / Timing Role: CD74HC125M buffers and gates sensor data streams under ECU command, ensuring clean signal delivery only during valid sampling windows. Use Value: Wide temperature range guarantees reliable operation at 125°C ambient; 6 V max supply accommodates transient battery spikes up to 16 V with external regulator. |
| Test Equipment Signal Routing | Legacy System Upgrade Interface |
Use Scenario: Multiplexing calibration signals across multiple DUT channels in automated test fixtures. IC Role / Device Role / Timing Role: CD74HC125M serves as a digitally controlled signal switch, with each channel independently enabled to route reference voltages or clock edges. Use Value: Propagation delay variation <15 ns across channels ensures precise timing alignment; SOIC-14 footprint allows dense PCB layout in space-constrained fixtures. | Use Scenario: Adapting modern 3.3 V FPGA I/O to legacy 5 V parallel peripherals (e.g., EPROM programmers, display controllers). IC Role / Device Role / Timing Role: CD74HC125M provides level-tolerant buffering with 3-state control, allowing bidirectional data handshaking without voltage translation ICs. Use Value: 2 V min supply supports 3.3 V core logic; 6 V max rating accepts 5 V bus voltage directly - eliminates discrete resistor networks or dedicated level shifters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer-with-3-state-output applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC125DR | Same logic function, identical SOIC-14 package, but TI's newer production variant with updated MSL rating (Level-1-260°C-UNLIM) and tighter VOH/VOL specs at 4.5 V | Drop-in replacement for new designs; not recommended for legacy qualification where CD74HC125M's specific thermal resistance (133.6°C/W) was validated | Select SN74HC125DR for cost-sensitive volume production requiring latest TI process node and RoHS compliance documentation |
| MC74HC125AD | Pin-compatible SOIC-14 device from ON Semiconductor; identical 2–6 V supply and –55°C to +125°C rating, but higher RθJA (140°C/W) and slightly slower tpd (20 ns @6 V) | Valid alternative where second-source assurance is required; may require minor thermal margin review in high-density layouts | Choose MC74HC125AD when dual-sourcing is mandated by procurement policy or long-term supply chain risk mitigation |
Compared with CD74HC125M, SN74HC125DR offers improved parametric consistency and updated packaging compliance, while MC74HC125AD provides cross-manufacturer redundancy at minor thermal and timing trade-offs - both require no PCB changes but differ in qualification history and thermal derating assumptions.
Availability
CD74HC125M is available at Aetrix Electronics and suitable for industrial bus isolation, automotive sensor interface, test equipment signal routing, and legacy system upgrade interface requiring stable component supply across extended temperature ranges.
Supply support for CD74HC125M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing solutions, with leadership in precision analog, power management, and high-reliability logic families.
The CD74HC125M belongs to TI's HC (High-Speed CMOS) logic family, engineered for low-power, wide-voltage operation in harsh-environment digital systems including automotive, industrial automation, and aerospace applications.
FAQ
What is the maximum capacitive load the CD74HC125M can drive while meeting datasheet timing specifications?
The CD74HC125M is characterized for CL = 50 pF in switching specifications, and design guidance recommends keeping total output capacitance ≤70 pF to maintain guaranteed propagation delay (tpd ≤26 ns at 6 V) and transition time (tt ≤15 ns). Exceeding this value increases delay and may cause signal integrity issues without series current-limiting resistors.
Does the CD74HC125M support true bidirectional data flow on its I/O pins?
No - the CD74HC125M is a unidirectional buffer: each channel has dedicated input (A), output (Y), and enable (OE) pins. It does not support automatic direction sensing or bus transceiver functionality. For bidirectional operation, discrete control logic or a dedicated transceiver like SN74LVC245 must be used alongside CD74HC125M.
Can unused inputs on the CD74HC125M be left floating?
No - all unused inputs on CD74HC125M must be terminated to either VCC or GND using direct connection or a 10 kΩ pull-up/pull-down resistor. Floating CMOS inputs cause undefined logic states, increased power consumption, and potential oscillation due to noise coupling, violating TI's layout guidelines and risking system instability.
What is the purpose of the 0.1 µF bypass capacitor specified for CD74HC125M?
The 0.1 µF ceramic capacitor placed between VCC and GND near the CD74HC125M provides high-frequency decoupling to suppress supply rail noise generated during output switching transitions. This prevents voltage droop and ground bounce that could affect neighboring logic devices or induce timing errors in synchronous systems using CD74HC125M.
Is the CD74HC125M pin-compatible with the CD74HCT125M?
Yes - CD74HC125M and CD74HCT125M share identical SOIC-14 pinout and functional block diagram. However, CD74HCT125M uses TTL-compatible input thresholds (VIH = 2.0 V min) versus CMOS thresholds (VIH = 0.7×VCC) in CD74HC125M, making them electrically incompatible without level adaptation in mixed-logic systems.
CD74HC125M Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 7.8mA, 7.8mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
CD74HC125M FAQ
1.How can I place an order for CD74HC125M through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HC125M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HC125M reliable?
The price and inventory of CD74HC125M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HC125M is usually 5 days.
3.What payment methods are accepted for CD74HC125M?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HC125M transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74HC125M?
CD74HC125M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74HC125M order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HC125M?
For technical support, including CD74HC125M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HC125M requirements.
6.How does Aetrix verify that CD74HC125M is sourced from the original manufacturer or authorized distributors?
All CD74HC125M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HC125M meets industry standards.
7.What is the process for return or replacement of CD74HC125M?
All CD74HC125M units undergo pre-shipment inspection (PSI). If there is an issue with CD74HC125M, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HC125M part is unused and in its original packaging.
Return procedure for CD74HC125M:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD74HC125M Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
