Texas Instruments CD74HC138MT
- Part No.:
- CD74HC138MT
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74HC138MT.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD74HC138MT from Texas Instruments is a high-speed CMOS 3-to-8 line decoder/demultiplexer with active-low outputs, operating from 2 V to 6 V, featuring 13 ns typical propagation delay at 5 V/15 pF, -55°C to +125°C temperature range, and three enable inputs (G2, G1, G0) for cascading in memory address decoding or I/O port selection applications.
For engineers reviewing the CD74HC138MT datasheet, CD74HC138MT pinout, CD74HC138MT application, or CD74HC138MT equivalent, key selection criteria include its inverting output logic, wide supply voltage tolerance, industrial temperature rating, low power consumption versus LSTTL, and compatibility with standard CMOS and TTL-level inputs.
Technical Context
The CD74HC138MT implements a 3-input binary address decoder with three independent enable inputs-G2 (active-high), G1 and G0 (both active-low)-that collectively gate all eight Y0–Y7 outputs into a high-impedance or forced-high state when asserted. Its logic function strictly follows the '138 truth table where only one output goes low per valid address combination when all enables are satisfied.
It uses silicon-gate CMOS technology with balanced rise/fall times, fanout of 10 LSTTL loads on standard outputs, and input clamp diode protection rated for ±20 mA. Propagation delay and transition time are characterized across full temperature and voltage ranges, with dynamic power dissipation modeled via Cpd = 67 pF at 5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | 3-to-8 line decoder/demultiplexer with active-low outputs (Y0–Y7) |
| Supply Voltage | 2 V to 6 V - supports mixed-voltage system interfacing and battery-powered operation |
| Propagation Delay | 13 ns typ @ VCC = 5 V, CL = 15 pF, TA = 25°C - enables timing-critical address decoding up to ~20 MHz |
| Operating Temperature | -55°C to +125°C - qualified for industrial, automotive under-hood, and military-grade environments |
| Output Drive | ±4 mA @ VCC = 4.5 V - sufficient to directly drive LED indicators or small logic loads without buffers |
| Input Compatibility | CMOS- and TTL-compatible inputs: VIH = 3.15 V min, VIL = 1.35 V max @ 4.5 V - interoperable with 74LS, 74ALS, and other HC/HCT families |
| Power Dissipation Cap. | Cpd = 67 pF - used to calculate dynamic power as P = Cpd × VCC² × f, critical for thermal budgeting |
Pinout & Package
CD74HC138MT is supplied in a 16-pin SOIC (D) package measuring 9.90 mm × 3.90 mm, with standard surface-mount footprint and gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address Input | LSB of 3-bit binary address; determines output selection along with A1 and A2 |
| 2 (A1) | Address Input | Mid-bit of 3-bit binary address; required for full 1-of-8 decode resolution |
| 3 (A2) | Address Input | MSB of 3-bit binary address; completes address mapping to Y0–Y7 |
| 4 (G0) | Enable Input | Active-low strobe; forces all outputs high when logic low, enabling cascaded decoder control |
| 5 (G1) | Enable Input | Active-low strobe; second gating signal for hierarchical enable architecture |
| 6 (G2) | Enable Input | Active-high strobe; third independent enable path, allowing flexible logic-level enable combinations |
| 7 (Y7) | Output | Active-low decoded output corresponding to A2A1A0 = 111; sinks current when selected |
| 8 (GND) | Ground | Reference return path for all internal circuitry and I/O; must be low-impedance |
| 9 (Y6) | Output | Active-low decoded output for A2A1A0 = 110; electrically identical to Y0–Y7 |
| 10 (Y5) | Output | Active-low decoded output for A2A1A0 = 101; shares same DC specs and AC timing |
| 11 (Y4) | Output | Active-low decoded output for A2A1A0 = 100; used in memory chip select or peripheral routing |
| 12 (Y3) | Output | Active-low decoded output for A2A1A0 = 011; supports demultiplexing when G2 used as data input |
| 13 (Y2) | Output | Active-low decoded output for A2A1A0 = 010; matches propagation delay spec across all outputs |
| 14 (Y1) | Output | Active-low decoded output for A2A1A0 = 001; verified for fanout of 10 LSTTL loads |
| 15 (Y0) | Output | Active-low decoded output for A2A1A0 = 000; primary output for base-address selection |
| 16 (VCC) | Supply | Positive power rail; requires local 0.1 µF bypass capacitor per TI layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Inverting 1-of-8 decode | Single low output per valid address (A2–A0) when all enables satisfied - simplifies active-low chip select design |
| Three independent enables | G2 (active-high), G1/G0 (active-low) allow hierarchical decoding across multiple devices without external logic |
| Wide voltage operation | 2 V to 6 V supply range enables direct interface with 3.3 V microcontrollers and legacy 5 V systems |
| High noise immunity | NIL/NIL = 30% of VCC at 5 V - rejects common-mode noise in noisy industrial environments |
| Low dynamic power | ICC = 8 µA typical @ 6 V - reduces standby current vs. LSTTL, critical for battery-backed systems |
Applications
| Memory Address Decoding | I/O Port Selection |
|---|---|
Use Scenario: Selecting one of eight RAM/ROM chips in a microcontroller-based embedded system with 16-bit address bus. IC Role / Device Role / Timing Role: CD74HC138MT acts as address-space partitioner, decoding upper address bits (A13–A15) to assert individual /CS lines. Use Value: Eliminates discrete logic gates; ensures glitch-free chip selection with 13 ns propagation delay and simultaneous enable gating. | Use Scenario: Routing serial data between a UART and one of eight peripheral sensors in an industrial PLC backplane. IC Role / Device Role / Timing Role: CD74HC138MT functions as data demultiplexer, using G2 as data input and A2–A0 to route to selected sensor channel. Use Value: Enables single-wire broadcast with per-channel enable, reducing PCB trace count and eliminating need for eight separate drivers. |
| LED Display Multiplexing | Industrial Control Logic |
Use Scenario: Driving common-cathode 7-segment displays in a multi-digit panel meter with shared segment lines. IC Role / Device Role / Timing Role: CD74HC138MT selects digit position by sinking current through cathodes (Y0–Y7), synchronized with segment driver updates. Use Value: Provides precise 1-of-8 current sink capability (±4 mA per output), supporting multiplexed brightness control without external transistors. | Use Scenario: Implementing safety interlock logic in a CNC machine controller where eight subsystems require independent enable signals. IC Role / Device Role / Timing Role: CD74HC138MT generates eight isolated, enable-gated control signals from a 3-bit configuration register and master safety flag. Use Value: Guarantees fail-safe behavior: all outputs go high (inactive) if any enable fails, meeting SIL-2 functional safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC138DR | Same pinout, identical logic function, but TI's newer production version with enhanced ESD rating (4 kV HBM) and tighter AC specs (tpd = 12 ns typ @ 5 V) | Drop-in replacement in new designs; not recommended for legacy qualification-critical aerospace programs requiring CD74HC138MT's specific lot history | Select SN74HC138DR for cost-sensitive volume production where latest process and reliability are prioritized. |
| MC74HC138ADTR2G | Pin-compatible SOIC-16 variant from ON Semiconductor; identical VCC range and temperature rating, but slightly higher ICC (15 µA typ @ 6 V) and lower noise margin (NIL = 25% of VCC) | Suitable for commercial-temperature applications; requires validation if operating near -55°C or +125°C extremes | Choose MC74HC138ADTR2G only when dual-sourcing is mandated and full industrial temp validation is complete. |
Compared with SN74HC138DR and MC74HC138ADTR2G, CD74HC138MT offers proven long-term stability in extended temperature environments and legacy design continuity, while trading minor delays and power for field-proven robustness in mission-critical industrial deployments.
Availability
CD74HC138MT is available at Aetrix Electronics and suitable for memory address decoding, I/O port selection, LED display multiplexing, and industrial control logic requiring stable component supply across extended temperature ranges.
Supply support for CD74HC138MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, personal electronics, and communications markets.
CD74HC138MT belongs to TI's CD74HC logic family, engineered for high-speed, low-power CMOS operation in harsh environments - specifically targeting industrial automation, test equipment, and avionics where reliability across -55°C to +125°C is non-negotiable.
FAQ
What is the maximum clock/data rate supported by CD74HC138MT in demultiplexer mode?
CD74HC138MT does not operate as a clocked device but as combinational logic. Its maximum usable data rate in demultiplexer mode is governed by propagation delay (13 ns typ) and output transition time (15 ns typ), supporting reliable switching up to approximately 20 MHz for clean digital waveforms with proper load capacitance (≤50 pF). For sustained high-frequency use, ensure VCC bypassing with a 0.1 µF capacitor near pin 16 and verify setup/hold margins in your specific timing path. The CD74HC138MT itself imposes no internal clock limit.
Can CD74HC138MT interface directly with 3.3 V microcontrollers?
Yes, CD74HC138MT supports 2 V to 6 V operation and has TTL-compatible input thresholds: VIH = 3.15 V min and VIL = 1.35 V max at VCC = 4.5 V. When powered at 3.3 V, its VIH is ~2.31 V (30% of 3.3 V), which safely accepts 3.3 V logic highs from standard microcontrollers. Its outputs swing rail-to-rail, providing 3.3 V compatible logic levels. No level-shifting circuitry is needed for direct connection to 3.3 V GPIOs driving CD74HC138MT inputs.
Does CD74HC138MT support cascading with other decoders, and how is it implemented?
Yes, CD74HC138MT supports cascading via its three enable inputs: G2 (active-high), G1 and G0 (both active-low). To cascade two devices, connect address lines A2–A0 in parallel, use higher-order address bits to control enables (e.g., A3 drives G2 of first device and G0 of second), and wire outputs to disjoint memory regions. All enables must be satisfied simultaneously for output activation. This architecture allows expansion to 1-of-16, 1-of-24, or larger decoding trees without external gates - a core design feature confirmed in the CD74HC138MT function tables and application notes.
What is the output drive strength of CD74HC138MT, and can it drive LEDs directly?
CD74HC138MT provides ±4 mA output current per Y0–Y7 pin at VCC = 4.5 V, sufficient to drive standard 2 mA LEDs in common-cathode configurations (with current-limiting resistor). For example, with VCC = 5 V and red LED VF ≈ 1.8 V, a 1 kΩ resistor yields ~3.2 mA sink current - well within spec. However, continuous DC drive of multiple outputs may exceed total package current limits (±50 mA), so duty cycling or external buffering is advised for high-brightness or multi-digit LED applications. Always reference the CD74HC138MT absolute maximum ratings before direct LED drive.
Is CD74HC138MT RoHS compliant, and what is its moisture sensitivity level?
CD74HC138MT is RoHS compliant per TI's packaging addendum, with lead finish NIPDAU (nickel-palladium-gold). Its moisture sensitivity level (MSL) is Level-1 at 260°C peak reflow, meaning it is not moisture-sensitive and requires no baking prior to soldering. This MSL rating applies to the SOIC (D) package variant and is documented in TI's official orderable addendum. As CD74HC138MT is marked "Obsolete" in TI's current status, Aetrix Electronics maintains traceable, tested inventory meeting original TI specifications including RoHS and MSL compliance.
CD74HC138MT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74HC138MT FAQ
1.How can I place an order for CD74HC138MT through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HC138MT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HC138MT reliable?
The price and inventory of CD74HC138MT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HC138MT is usually 5 days.
3.What payment methods are accepted for CD74HC138MT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HC138MT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74HC138MT?
CD74HC138MT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74HC138MT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HC138MT?
For technical support, including CD74HC138MT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HC138MT requirements.
6.How does Aetrix verify that CD74HC138MT is sourced from the original manufacturer or authorized distributors?
All CD74HC138MT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HC138MT meets industry standards.
7.What is the process for return or replacement of CD74HC138MT?
All CD74HC138MT units undergo pre-shipment inspection (PSI). If there is an issue with CD74HC138MT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HC138MT part is unused and in its original packaging.
Return procedure for CD74HC138MT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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