Texas Instruments CD74HC147E

Overview

CD74HC147E from Texas Instruments is a 9-input, active-low priority encoder IC performing 10-line-to-4-line binary encoding with decimal zero implied. It operates from 2V to 6V, delivers 13ns typical propagation delay at 5V/15pF, and supports industrial temperature range (–55°C to 125°C). It is used in keyboard matrix scanning and interrupt prioritization circuits where input contention resolution is required.

For engineers reviewing the CD74HC147E datasheet, CD74HC147E pinout, CD74HC147E application, or CD74HC147E equivalent, this page provides verified functional identity, validated PDIP-16 package mapping, confirmed active-low 9-input/4-output logic behavior, real-world timing and noise immunity specs, and two technically documented alternative parts for design flexibility.

Technical Context

The CD74HC147E implements combinational priority encoding logic with fixed input priority (I9 highest, I0 lowest) and active-low outputs (Y3–Y0). Its truth table encodes "zero" when all nine inputs are high, producing all-high outputs - a key feature distinguishing it from standard binary encoders.

It uses silicon-gate CMOS technology with buffered inputs/outputs, enabling fanout of 15 LSTTL loads and delivering high noise immunity (NIL/NIH = 30% of VCC at 5V). Propagation delay and transition times are balanced across temperature extremes, ensuring stable timing behavior in harsh environments.

Key Specifications

Pinout & Package

CD74HC147E is supplied in a 16-pin plastic dual in-line package (PDIP, N package), body size 19.31mm × 6.35mm, with through-hole mounting and standard 0.3-inch row spacing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar priority encoder applications.

Compared with CD74HC147E, CD74HCT147E offers stricter TTL input compatibility at the cost of reduced supply flexibility, while SN74LS147N provides legacy drop-in capability at the expense of power efficiency and speed - making CD74HC147E optimal for new low-power, wide-voltage designs.

Availability

CD74HC147E is available at Aetrix Electronics and suitable for industrial control panels, keyboard matrix interfaces, interrupt management subsystems, and legacy system upgrades requiring stable component supply over extended production lifecycles.

Supply support for CD74HC147E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions with over 50 years of innovation in high-reliability logic families.

The CD74HC147E belongs to TI's 74HC high-speed CMOS logic series, designed specifically for low-power, wide-voltage industrial and automotive applications requiring robust noise immunity and extended temperature operation.

FAQ

What is the logic polarity of inputs and outputs on the CD74HC147E?

The CD74HC147E features active-low inputs (I0–I9) and active-low outputs (Y3–Y0). All nine inputs must be pulled high (e.g., via resistors) when inactive, and any asserted input pulls its line low to trigger encoding. The resulting 4-bit binary output is also active-low - meaning Y3Y2Y1Y0 = LHLH represents decimal 5. This polarity is fixed and cannot be inverted internally.

Can CD74HC147E operate reliably at 3.3V supply voltage?

Yes, CD74HC147E is fully specified to operate from 2V to 6V, including 3.3V nominal systems. At VCC = 3.3V, its propagation delay increases to approximately 22ns (typical), input thresholds scale proportionally (VIH ≈ 2.3V, VIL ≈ 1.0V), and noise margins remain at 30% of VCC - making it suitable for mixed-voltage embedded designs without level shifters.

What does "implied decimal zero" mean in the CD74HC147E function description?

"Implied decimal zero" means the CD74HC147E outputs Y3Y2Y1Y0 = HHHH (all high) when all nine inputs (I0–I9) are high - representing encoded value "0" without requiring a dedicated I0 input line. This differs from standard encoders that require one input per digit; here, "zero" is the default state, and only non-zero digits activate corresponding inputs. The truth table confirms this behavior explicitly.

Is the NC pin (Pin 15) on CD74HC147E safe to connect to ground or VCC?

No - Pin 15 (NC) on CD74HC147E has no internal connection and must remain unconnected and electrically floating. Connecting it to ground, VCC, or any signal violates the device's mechanical and electrical specification and may cause unpredictable behavior or increased leakage current. Board layout must omit any trace, pad, or solder mask opening for this pin.

How does CD74HC147E handle simultaneous assertion of multiple inputs?

The CD74HC147E resolves simultaneous input assertions using fixed hardware priority: I9 > I8 > I7 > I6 > I5 > I4 > I3 > I2 > I1 > I0. When two or more inputs go low concurrently, only the highest-priority active input determines the output code - e.g., if I5 and I9 are both low, the output reflects I9's encoding (1001). This priority resolution is combinational and occurs within the specified propagation delay.