Texas Instruments CD74HC147M

Overview

CD74HC147M from Texas Instruments is a high-speed CMOS 9-input priority encoder performing 10-line-to-4-line active-low encoding with decimal "zero" implied logic, operating across 2V–6V supply range, featuring 13ns typical propagation delay at 5V/15pF, -55°C to +125°C temperature rating, and buffered inputs/outputs for industrial keypad scanning and fault-tolerant control systems.

For engineers reviewing the CD74HC147M datasheet, CD74HC147M pinout, CD74HC147M application, or CD74HC147M equivalent, this page delivers verified functional identity, SOIC-16 package mapping, truth-table-defined priority resolution (I9 highest), real-world timing specs under load, and validated alternative options for legacy logic redesigns requiring TTL-compatible encoding without LSTTL power penalty.

Technical Context

The CD74HC147M implements combinational priority encoding using silicon-gate CMOS technology, accepting nine active-low inputs (I0–I9) and generating four active-low binary outputs (Y0–Y3) where input I9 has highest priority and all-HIGH inputs encode as "zero" (all outputs HIGH). It operates strictly as a level-sensitive combinatorial device with no internal latching or clocking.

Its logic behavior follows a fixed priority hierarchy defined in the truth table: simultaneous active-low inputs resolve to the numerically highest asserted input, and output transitions are governed solely by input state changes-no enable, reset, or strobe control signals are present. Propagation delays vary with VCC (13ns typ. @ 5V, 240ns max @ 2V) and load capacitance (CL = 15pF or 50pF per test condition).

Key Specifications

Pinout & Package

CD74HC147M is packaged in a 16-pin SOIC (D package), body size 9.90mm × 3.90mm, with standard JEDEC MS-012AC outline and gull-wing leads. Pin 1 is located at the index corner with notch or dot marking.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar priority encoder applications.

Compared with CD74HC147M, CD74HCT147E offers seamless TTL integration at the cost of supply flexibility, while SN74LS147N provides legacy compatibility with significantly higher static power and narrower temperature tolerance - making CD74HC147M optimal for new designs prioritizing efficiency, ruggedness, and voltage scalability.

Availability

CD74HC147M is available at Aetrix Electronics and suitable for industrial HMI interfaces, automotive fault-monitoring subsystems, and legacy logic upgrades requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for CD74HC147M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in high-reliability IC design and manufacturing.

CD74HC147M belongs to TI's HC-series high-speed CMOS logic family, engineered for low-power, wide-voltage-operation replacements of legacy TTL in industrial control, instrumentation, and aerospace systems.

FAQ

What is the function of CD74HC147M and how does its priority encoding work?

CD74HC147M is a 9-input, 4-bit active-low priority encoder that converts up to nine simultaneous LOW inputs into a unique 4-bit binary code, with I9 having highest priority. When multiple inputs are LOW, CD74HC147M outputs the code corresponding to the numerically highest asserted input - for example, if I3 and I7 are both LOW, CD74HC147M outputs "7". All inputs HIGH yields "zero" (all outputs HIGH).

Does CD74HC147M support 3.3V logic systems?

Yes, CD74HC147M operates from 2V to 6V, making it fully compatible with 3.3V systems. At VCC = 3.3V, VIH is 2.31V (30% of 3.3V) and VIL is 1.1V, ensuring robust noise margins. However, note that CD74HC147M is not LSTTL-input compatible - direct interface with 3.3V microcontrollers is supported, but 5V TTL drivers require level translation.

What is the significance of the NC pin (Pin 15) on CD74HC147M?

Pin 15 of CD74HC147M is marked NC (No Connection) and has no internal bond wire or circuit connection. It must remain unconnected - neither grounded nor routed - to avoid mechanical stress on the die or unintended coupling. TI's mechanical drawings confirm this pin is intentionally left unpopulated in the SOIC-16 package.

Can CD74HC147M replace CD74HCT147 in an existing design?

CD74HC147M can replace CD74HCT147 only if the system operates within 2V–6V and uses CMOS-level inputs. CD74HCT147 accepts TTL input thresholds (VIH = 2V min), whereas CD74HC147M requires VIH ≥ 3.15V at 4.5V - so direct substitution in 5V TTL systems will cause logic errors. Verify input driver compatibility before swapping CD74HC147M into a CD74HCT147 design.

What decoupling capacitor value is recommended for CD74HC147M?

Texas Instruments specifies a 0.1µF ceramic capacitor placed as close as possible to the VCC (Pin 16) and GND (Pin 8) pins of CD74HC147M. This minimizes supply noise and ensures clean switching transitions. For high-noise environments, TI recommends paralleling with a 1µF capacitor - but the 0.1µF unit is mandatory and must have low ESL/ESR characteristics.