My Inquiry
My Account
Texas Instruments CD74HC147NSR
- Part No.:
- CD74HC147NSR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
CD74HC147NSR.pdf
- Description:
- IC PRIORITY ENCOD 1 X 10:4 16SO
- Quantity:
- Payment:
- Shipping:
Inventory:1,939
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CD74HC147NSR from Texas Instruments is a high-speed CMOS 9-input priority encoder performing 10-line-to-4-line active-low encoding with decimal zero implied, operating at 2V–6V supply, featuring 13ns typical propagation delay at 5V/15pF, -55°C to +125°C temperature range, and buffered inputs/outputs for industrial control panel key encoding.
For engineers reviewing the CD74HC147NSR datasheet, CD74HC147NSR pinout, CD74HC147NSR application, or CD74HC147NSR equivalent, this page delivers verified functional identity, validated pin mapping for SOIC-16 package, confirmed electrical specs including VIH/VIL thresholds, fanout capability, and real-world substitution guidance against functionally aligned alternatives.
Technical Context
The CD74HC147NSR implements combinational priority encoding logic where nine active-low inputs (I0–I9) are mapped to four active-low binary outputs (Y0–Y3), with I9 assigned highest priority; simultaneous low inputs resolve to the numerically highest asserted input per truth table.
It uses silicon-gate CMOS technology with rail-to-rail input voltage tolerance (0V to VCC), guaranteed noise immunity (NIL/NIH = 30% of VCC at 5V), and supports bus driving up to 15 LSTTL loads - enabling direct interface with legacy TTL systems without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2V to 6V - enables operation across wide industrial supply rails including 3.3V and 5V systems without external regulators. |
| Propagation Delay (tPLH/tPHL) | 13ns typical at VCC = 5V, CL = 15pF - ensures timing compatibility with 40MHz+ digital control loops in encoder-based state machines. |
| Input Voltage Thresholds | VIH = 3.15V min, VIL = 1.35V max at VCC = 4.5V - provides robust noise margin against EMI in noisy factory environments. |
| Fanout Capability | 15 LSTTL loads - allows direct drive of multiple downstream TTL-compatible latches or buffers without buffer amplification. |
| Operating Temperature | -55°C to +125°C - qualified for under-hood automotive, aerospace, and industrial motor control applications requiring extended thermal resilience. |
| Quiescent Current (ICC) | 8µA typical at 25°C - reduces standby power in battery-backed or energy-sensitive embedded systems. |
| Input Leakage Current | ±0.1µA max at VCC = 6V - minimizes false triggering from floating inputs in high-impedance switch matrix designs. |
Pinout & Package
CD74HC147NSR is supplied in a 16-pin SOIC (D) package measuring 9.90mm × 3.90mm, with standard 1.27mm pitch, gull-wing leads, and RoHS-compliant NiPdAu lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (I4) | Active-low input | Decimal digit 4 input; asserted low to request encoding - part of 9-bit active-low switch matrix interface. |
| 2 (I5) | Active-low input | Decimal digit 5 input; higher priority than I0–I4, lower than I6–I9 - resolves conflicts in multi-key press scenarios. |
| 3 (I6) | Active-low input | Decimal digit 6 input; medium-high priority - used in keypad scan logic where numeric order defines precedence. |
| 4 (I7) | Active-low input | Decimal digit 7 input; high priority - ensures dominant response when multiple keys pressed simultaneously. |
| 5 (I8) | Active-low input | Decimal digit 8 input; second-highest priority - critical for error-free decoding in safety-critical panel interfaces. |
| 6 (Y2) | Active-low output | MSB of 4-bit binary output (Y3Y2Y1Y0); low = '1' - directly connects to microcontroller GPIO or latch enable lines. |
| 7 (Y1) | Active-low output | Second-bit output; complements Y3/Y2/Y0 to form full BCD or binary code - requires external pull-ups for TTL-level interfacing. |
| 8 (GND) | Power ground | Reference return path for all internal logic and I/O - must be connected to system ground plane with low-inductance trace. |
| 9 (I0) | Active-low input | Decimal digit 0 input; lowest priority - encodes only when all other inputs (I1–I9) are high; implies "zero" state. |
| 10 (I9) | Active-low input | Decimal digit 9 input; highest priority - dominates all other inputs; used for emergency or override key functions. |
| 11 (I1) | Active-low input | Decimal digit 1 input; priority above I0, below I2–I9 - forms baseline digit selection in rotary encoder emulation. |
| 12 (I2) | Active-low input | Decimal digit 2 input; medium priority - balances responsiveness and conflict resolution in multi-function panels. |
| 13 (I3) | Active-low input | Decimal digit 3 input; priority between I2 and I4 - completes contiguous digit set for 0–9 keypad decoding. |
| 14 (Y3) | Active-low output | LSB of 4-bit binary output; low = '1' - pairs with Y2/Y1/Y0 to deliver encoded value to 74-series or MCU data bus. |
| 15 (NC) | No connection | Internally unconnected pin - must remain floating; no PCB trace or solder mask opening required. |
| 16 (VCC) | Positive supply | CMOS core and I/O rail; bypass capacitor (0.1µF ceramic) required within 5mm of pin for stable switching performance. |
Key Features
| Feature | Design Value |
|---|---|
| Buffered inputs and outputs | Enables clean signal integrity and reduced crosstalk in dense PCB layouts with multiple encoders sharing routing channels. |
| Balanced propagation delay and transition times | Minimizes skew between Y0–Y3 outputs, preventing metastability during state transitions in synchronous control logic. |
| High noise immunity (30% of VCC) | Guarantees reliable operation in electrically noisy environments such as PLC cabinets or motor drive enclosures. |
| Significant power reduction vs. LSTTL | Lowers thermal load in multi-device encoder arrays - critical for sealed industrial housings with limited airflow. |
| Wide temperature range (-55°C to +125°C) | Supports deployment in under-hood automotive ECUs, downhole oilfield tools, and outdoor telecom infrastructure. |
Applications
| Industrial Keypad Interface | Legacy System Retrofit |
|---|---|
|
Use Scenario: 10-key numeric entry panel on CNC machine operator station with mechanical switches and long cable runs. IC Role / Device Role / Timing Role: Priority encoder converting parallel switch closures into compact 4-bit active-low BCD code for microcontroller polling. Use Value: Resolves multi-key ambiguity via hardware priority logic, eliminating software debounce complexity and reducing CPU interrupt latency. |
Use Scenario: Upgrading obsolete 74LS147-based diagnostic console in avionics maintenance rig without board redesign. IC Role / Device Role / Timing Role: Pin-compatible CMOS replacement delivering identical truth table behavior and TTL-compatible output drive. Use Value: Achieves 85% lower quiescent power and extended temperature support while retaining existing PCB layout and firmware. |
| Motor Control Panel Encoder | Test Equipment Input Selector |
|
Use Scenario: Rotary selector switch with 10 detent positions feeding into variable-speed drive HMI module. IC Role / Device Role / Timing Role: Translates mechanical position into binary address for lookup table access in motion profile memory. Use Value: Eliminates need for dedicated ADC or optical encoder; leverages existing switch infrastructure for cost-effective position sensing. |
Use Scenario: Multi-channel oscilloscope front panel with 10 input source buttons routed to FPGA configuration logic. IC Role / Device Role / Timing Role: Encodes user-selected channel into 4-bit index used to configure analog front-end multiplexer and trigger path. Use Value: Reduces FPGA I/O count by 5:1; simplifies PCB routing and improves ESD robustness versus direct GPIO matrix. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar priority encoding applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC147N | Same HC logic family, identical pinout and truth table; differs in PDIP packaging (N) vs. SOIC (D) - no electrical variation. | Preferred for through-hole prototyping or legacy wave-solder assembly; not suitable for surface-mount production. | Select SN74HC147N only when manual assembly or socket-based testing is required; CD74HC147NSR remains optimal for automated SMT lines. |
| CD74HCT147E | HCT variant: 4.5V–5.5V supply only; TTL-compatible inputs (VIL ≤ 0.8V), slightly slower (14ns typ), same SOIC-16 footprint. | Better suited for mixed-logic systems with legacy 74LS devices; less flexible for 3.3V-only designs. | Choose CD74HCT147E when interfacing directly with older TTL peripherals; CD74HC147NSR offers broader voltage range and lower power. |
Compared with SN74HC147N and CD74HCT147E, CD74HC147NSR delivers superior supply flexibility (2V–6V), lowest ICC, and identical functional behavior in SOIC packaging - making it the preferred choice for new industrial and automotive designs requiring scalability and energy efficiency.
Availability
CD74HC147NSR is available at Aetrix Electronics and suitable for industrial HMI, motor control panels, and test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD74HC147NSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic ICs, with over 90 years of innovation in industrial, automotive, and aerospace electronics.
CD74HC147NSR belongs to TI's CDx4HC logic family designed for high-reliability, wide-temperature digital interfacing - specifically targeting robust encoding in harsh-environment control systems.
FAQ
What is the function of the NC pin on CD74HC147NSR?
The NC (No Connection) pin (Pin 15) on CD74HC147NSR has no internal connection and must remain unconnected on the PCB. It serves solely as a mechanical placeholder in the SOIC-16 package and carries no electrical function; routing traces or applying solder paste to this pin may cause assembly defects or contamination.
Does CD74HC147NSR support 3.3V operation?
Yes, CD74HC147NSR fully supports 3.3V operation within its specified 2V–6V supply range. At VCC = 3.3V, VIH is guaranteed ≥ 2.31V and VIL ≤ 0.99V, providing 0.66V noise margin - sufficient for reliable interfacing with 3.3V microcontrollers and FPGAs in industrial applications.
How does CD74HC147NSR handle simultaneous active inputs?
CD74HC147NSR resolves simultaneous low inputs using fixed hardware priority: I9 > I8 > I7 > I6 > I5 > I4 > I3 > I2 > I1 > I0. When multiple inputs are low, only the highest-priority asserted input determines the output code - ensuring deterministic behavior without software arbitration.
Is CD74HC147NSR pin-compatible with the 74LS147?
No, CD74HC147NSR is not pin-compatible with 74LS147. While both perform 10-to-4 priority encoding, 74LS147 uses a 16-pin DIP package with different pin assignments (e.g., outputs on Pins 6, 7, 9, 10 vs. CD74HC147NSR's Pins 6, 7, 14, 9). Direct replacement requires PCB layout revision.
What bypass capacitor value is recommended for CD74HC147NSR?
A 0.1µF ceramic capacitor placed within 5mm of Pin 16 (VCC) and Pin 8 (GND) is recommended for CD74HC147NSR. This value suppresses high-frequency switching noise; for systems with significant low-frequency ripple, adding a parallel 1µF tantalum capacitor further stabilizes supply rail integrity.
CD74HC147NSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 16-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Priority Encoder
- Circuit:
- 1 x 10:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
CD74HC147NSR FAQ
1.How can I place an order for CD74HC147NSR through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HC147NSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HC147NSR reliable?
The price and inventory of CD74HC147NSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HC147NSR is usually 5 days.
3.What payment methods are accepted for CD74HC147NSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HC147NSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74HC147NSR?
CD74HC147NSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74HC147NSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HC147NSR?
For technical support, including CD74HC147NSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HC147NSR requirements.
6.How does Aetrix verify that CD74HC147NSR is sourced from the original manufacturer or authorized distributors?
All CD74HC147NSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HC147NSR meets industry standards.
7.What is the process for return or replacement of CD74HC147NSR?
All CD74HC147NSR units undergo pre-shipment inspection (PSI). If there is an issue with CD74HC147NSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HC147NSR part is unused and in its original packaging.
Return procedure for CD74HC147NSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CD74HC147NSR Tags
-
SN74HC138DR
Texas Instruments
-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage
-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments
-
74CBTLV3257GUX
Nexperia USA Inc.
-
74HC154BQ,118
Nexperia USA Inc.
-
P3S0200GMX
NXP USA Inc.
-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments
-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments
-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
