Texas Instruments CD74HC367MT
- Part No.:
- CD74HC367MT
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74HC367MT.pdf
- Description:
- IC BUFFER NON-INVERT 6V 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD74HC367MT from Texas Instruments is a high-speed CMOS hex non-inverting buffer/line driver with three-state outputs, designed for bus interface and data routing in industrial control and instrumentation systems. It features dual independent three-state enable controls (1OE, 2OE), 8 ns typical propagation delay at 5 V/15 pF, ±35 mA output drive capability, and operates across -55°C to +125°C.
For engineers reviewing the CD74HC367MT datasheet, CD74HC367MT pinout, CD74HC367MT application, or CD74HC367MT equivalent, this page delivers verified functional identity, validated SOIC-16 pin mapping, temperature-rated electrical performance, and real-world bus-driving use cases - all grounded in TI's SCHS181E production data sheet.
Technical Context
The CD74HC367MT implements six independent non-inverting buffer channels grouped into two logic sections: four channels controlled by 1OE (pins 1, 2, 3, 4, 5, 6, 7, 9, 10) and two by 2OE (pins 15, 12, 11, 14, 13). Each output supports high-current sourcing/sinking (±35 mA) and transitions to high-impedance when its respective OE is high.
It belongs to the HC logic family, supporting 2–6 V supply operation with CMOS input thresholds (VIH = 1.5 V min at 2 V, 4.2 V min at 6 V), 10 LSTTL fanout on standard outputs, and 15 LSTTL fanout on bus-driver outputs - enabling robust noise immunity (30% of VCC) and compatibility with mixed-voltage system backplanes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | High-speed CMOS (HC), not TTL-compatible; requires 2–6 V supply, not 4.5–5.5 V like HCT variants. |
| Propagation Delay | 8 ns typical (tPLH/tPHL) at VCC = 5 V, CL = 15 pF, TA = 25°C - enables ≤125 MHz bus toggle rates under light load. |
| Output Drive | ±35 mA continuous per output - sufficient to drive 15 LSTTL loads or ≥50 pF bus capacitance without signal degradation. |
| Operating Temperature | -55°C to +125°C - qualified for extended industrial, aerospace, and defense applications per MIL-PRF-38535. |
| Three-State Leakage | ±10 μA max (IOZ) over full temperature range - ensures minimal bus contention current during high-Z state. |
| Supply Current | 160 μA max ICC at -55°C to +125°C - ultra-low static power vs. LS-TTL, critical for battery-backed or thermally constrained systems. |
| Input Thresholds | VIH = 1.5 V (min @ 2 V), 3.15 V (min @ 4.5 V), 4.2 V (min @ 6 V); VIL = 0.5 V (max @ 2 V), 1.35 V (max @ 4.5 V) - ensures reliable switching across supply range. |
Pinout & Package
CD74HC367MT uses a 16-pin SOIC (D package) with nominal body size 9.90 mm × 3.90 mm, RoHS-compliant NiPdAu lead finish, and moisture sensitivity level (MSL) 1 (unlimited floor life at ≤30°C/60% RH).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1OE (Output Enable 1) | Active-low enable for Y1–Y4 buffers; drives all four outputs to high-Z when high. |
| 2 | 1A1 (Input 1) | Non-inverting input for first buffer channel; directly routed to Y1 (pin 3). |
| 3 | 1Y1 (Output 1) | Non-inverting buffered output; capable of ±35 mA drive and 15 LSTTL fanout. |
| 4 | 1A2 (Input 2) | Non-inverting input for second buffer; connects to Y2 (pin 5). |
| 5 | 1Y2 (Output 2) | Non-inverting output; shares 1OE control with pins 1–3 and 6–7. |
| 6 | 1A3 (Input 3) | Non-inverting input for third buffer; routes to Y3 (pin 7). |
| 7 | 1Y3 (Output 3) | Non-inverting output; part of first group (1OE-controlled) with pins 1–3, 4–5, 6–7, 9–10. |
| 9 | 1A4 (Input 4) | Non-inverting input for fourth buffer; connects to Y4 (pin 10). |
| 10 | 1Y4 (Output 4) | Non-inverting output; completes first group of four buffers under 1OE. |
| 11 | 2Y1 (Output 5) | Non-inverting output; controlled by 2OE (pin 15); part of second group (2-channel). |
| 12 | 2A1 (Input 5) | Non-inverting input for fifth buffer; routes to Y1 (pin 11). |
| 13 | 2Y2 (Output 6) | Non-inverting output; second channel in 2OE group; matches pin 11 in function and control. |
| 14 | 2A2 (Input 6) | Non-inverting input for sixth buffer; connects to Y2 (pin 13). |
| 15 | 2OE (Output Enable 2) | Active-low enable for Y1/Y2 (pins 11, 13); independent of 1OE (pin 1), enabling split-bus control. |
| 8 | GND | Ground reference for all logic and output stages; must be low-impedance connection. |
| 16 | VCC | Positive supply rail (2–6 V); requires local 0.1 µF bypass capacitor per TI layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent three-state enables | Enables partitioned bus control: 4-channel (1OE) and 2-channel (2OE) groups allow selective isolation of subsystems without global bus shutdown. |
| High-current bus driver outputs | ±35 mA per output sustains signal integrity when driving long traces, multiple receivers, or capacitive loads up to 50 pF - eliminating need for external line drivers. |
| Wide supply voltage range (2–6 V) | Supports direct interfacing with 3.3 V microcontrollers, 5 V legacy peripherals, and mixed-voltage backplanes without level shifters. |
| Extended temperature operation (-55°C to +125°C) | Validated for deployment in engine control units, downhole tools, and avionics where ambient extremes exceed commercial grade limits. |
| Low dynamic power dissipation | CPD = 40 pF enables sub-mW active power at 1 MHz (PD ≈ VCC² × f × (CPD + CL)); reduces thermal load in dense PCB layouts. |
Applications
| Industrial PLC Backplane Interface | Automotive ECU Data Bus Isolation |
|---|---|
Use Scenario: Isolating sensor data lanes from CPU bus during firmware updates in programmable logic controllers. IC Role / Device Role / Timing Role: Non-inverting buffer with independent 1OE/2OE controls acts as bidirectional bus gatekeeper, preventing spurious writes during reconfiguration. Use Value: Dual enable architecture allows selective disabling of analog I/O channels (1OE) while maintaining CAN diagnostics path (2OE), minimizing system downtime. |
Use Scenario: Buffering ADC sample data from high-noise engine bay sensors before transmission to MCU via SPI or parallel interface. IC Role / Device Role / Timing Role: High-drive hex buffer conditions signals for noise resilience; 8 ns propagation delay preserves timing margins in 100 kHz sampling systems. Use Value: ±35 mA output drive maintains clean edges across 15 cm ribbon cable runs, reducing bit errors without adding series termination resistors. |
| Aerospace Avionics Signal Multiplexing | Test Equipment Digital Pattern Generation |
Use Scenario: Routing discrete status signals (e.g., door open/closed, fire detection) across redundant flight control buses in UAVs. IC Role / Device Role / Timing Role: Six-channel non-inverting repeater with -55°C to +125°C rating ensures deterministic latency and fault containment in harsh environments. Use Value: Extended temperature qualification eliminates derating calculations; 15 LSTTL fanout supports daisy-chained monitoring nodes without repeaters. |
Use Scenario: Driving 16-bit parallel address/data buses in automated test equipment (ATE) pattern generators with variable load capacitance. IC Role / Device Role / Timing Role: Hex buffer provides matched propagation delay (≤27 ns max over temp) across all six channels, preserving setup/hold timing skew. Use Value: Tight tPLH/tPHL matching (<2 ns variation) ensures simultaneous edge alignment across multi-bit buses, critical for high-speed digital stimulus. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex non-inverting buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD74HC367M96 | Same die, SOIC-16 tape-and-reel variant (2500 pcs/reel); MSL-1, RoHS-compliant NiPdAu finish; active production status vs. MT's obsolete status. | Designed for high-volume SMT assembly; compatible footprint and pinout; identical AC/DC specs and temperature range. | Select CD74HC367M96 for new designs requiring volume procurement, guaranteed supply continuity, and modern packaging compliance. |
| SN74HC244N | TI's pin-compatible alternative with identical 16-pin PDIP/SOIC footprint; same dual-OE architecture and ±35 mA drive, but rated only to 85°C (not -55°C to 125°C). | Suitable for commercial/industrial environments; lacks extended temperature validation required for aerospace, military, or under-hood automotive use. | Choose SN74HC244N only if operating temperature stays within -40°C to +85°C and MIL-spec qualification is unnecessary. |
Compared with CD74HC367MT, CD74HC367M96 offers assured long-term availability and RoHS compliance for production ramp-up, while SN74HC244N trades extended temperature capability for lower cost and broader distributor stock - making it viable only in non-extreme thermal environments.
Availability
CD74HC367MT is available at Aetrix Electronics and suitable for industrial control systems, aerospace data acquisition modules, and automotive electronic control units requiring stable component supply across extreme temperature ranges and long product lifecycles.
Supply support for CD74HC367MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of heritage in high-reliability logic families for industrial and defense markets.
The CD74HC367MT belongs to TI's CD74HC high-speed CMOS logic portfolio, engineered specifically for robust bus interfacing, signal conditioning, and data routing in mission-critical systems demanding wide temperature operation and low power.
FAQ
What is the supply voltage range supported by CD74HC367MT?
The CD74HC367MT operates from 2 V to 6 V DC, as specified in TI's SCHS181E datasheet Section 5.2. This wide range enables interoperability with 3.3 V microcontrollers, 5 V legacy peripherals, and mixed-voltage backplanes - unlike HCT variants, which are limited to 4.5–5.5 V. Operation outside this range risks damage or undefined behavior.
Does CD74HC367MT support true three-state outputs, and how are they controlled?
Yes, CD74HC367MT provides true three-state outputs via two independent active-low enables: 1OE (pin 1) controls Y1–Y4, and 2OE (pin 15) controls Y1/Y2 of the second group (pins 11, 13). When either OE is high, its associated outputs enter high-impedance mode with ≤±10 μA leakage (Section 5.4), enabling safe bus sharing without contention.
What is the maximum output drive capability of CD74HC367MT, and how does it impact bus loading?
CD74HC367MT delivers ±35 mA per output (Section 5.1), allowing it to drive up to 15 LSTTL loads or ≥50 pF total bus capacitance while maintaining signal integrity. This eliminates need for external drivers in medium-length traces or multi-drop configurations - a key advantage over standard logic buffers with ≤24 mA drive.
Is CD74HC367MT pin-compatible with CD74HC367M96 or SN74HC244N?
CD74HC367MT is pin-compatible with CD74HC367M96 (same SOIC-16 package, identical pinout and electrical specs), but not with SN74HC244N - though both share the same 16-pin SOIC footprint and dual-OE architecture, SN74HC244N has different input/output grouping and lacks extended temperature validation. Always verify pin functions against respective datasheets before substitution.
What is the operating temperature range of CD74HC367MT, and what standards does it meet?
CD74HC367MT is rated for -55°C to +125°C operation (Section 5.2), meeting MIL-PRF-38535 requirements for high-reliability applications. This qualifies it for use in engine control units, downhole instrumentation, and avionics where commercial-grade parts (-40°C to +85°C) would fail - confirmed by TI's production data sheet revision FEBRUARY 2022.
CD74HC367MT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 2, 4 (Hex)
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 7.8mA, 7.8mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74HC367MT FAQ
1.How can I place an order for CD74HC367MT through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HC367MT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HC367MT reliable?
The price and inventory of CD74HC367MT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HC367MT is usually 5 days.
3.What payment methods are accepted for CD74HC367MT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HC367MT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74HC367MT?
CD74HC367MT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74HC367MT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HC367MT?
For technical support, including CD74HC367MT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HC367MT requirements.
6.How does Aetrix verify that CD74HC367MT is sourced from the original manufacturer or authorized distributors?
All CD74HC367MT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HC367MT meets industry standards.
7.What is the process for return or replacement of CD74HC367MT?
All CD74HC367MT units undergo pre-shipment inspection (PSI). If there is an issue with CD74HC367MT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HC367MT part is unused and in its original packaging.
Return procedure for CD74HC367MT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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