Texas Instruments CD74HC73M
- Part No.:
- CD74HC73M
- Manufacturer:
- Texas Instruments
- Category:
- Flip Flops
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74HC73M.pdf
- Description:
- IC FF JK TYPE DUAL 1BIT 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:170
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Product details
Overview
CD74HC73M from Texas Instruments is a dual J-K flip-flop with asynchronous reset, negative-edge clock triggering, complementary Q/Q̅ outputs, and buffered inputs - designed for synchronous logic control in digital systems operating from 2 V to 6 V. It delivers 60 MHz maximum clock frequency at 5 V/15 pF, supports –55°C to +125°C industrial/military temperature range, and drives up to 10 LSTTL loads.
For engineers reviewing the CD74HC73M datasheet, CD74HC73M pinout, CD74HC73M application, or CD74HC73M equivalent, this page provides verified functional identity, SOIC-14 package mapping, timing parameters (tPLH/tPHL ≤ 41 ns @ 6 V), noise-immune hysteresis on clock inputs, and validated alternatives for logic-level-compatible J-K flip-flop replacement.
Technical Context
The CD74HC73M implements two independent edge-triggered J-K flip-flops in a single silicon-gate CMOS IC, each with dedicated J, K, CLK, and asynchronous RESET inputs plus true/complement outputs. Its negative-edge-triggered operation ensures state changes only on high-to-low clock transitions, while hysteresis on CLK inputs improves noise immunity and accommodates slower input rise/fall times.
All logic functions conform to HC-type specifications: 2–6 V supply range, VIH/VIL thresholds scalable with VCC (e.g., VIH = 4.2 V min @ 6 V), and guaranteed fanout of 10 LSTTL loads across the full temperature range. Propagation delays are balanced (tPLH ≈ tPHL), and power dissipation remains low (ICC ≤ 80 μA typical @ 25°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | High-speed CMOS (HC), compatible with 2–6 V supply - enables direct interface with mixed-voltage systems without level shifters. |
| Max Clock Frequency | 60 MHz @ VCC = 5 V, CL = 15 pF - supports high-speed counter and state-machine designs in industrial control. |
| Propagation Delay | ≤ 41 ns @ VCC = 6 V, CL = 50 pF - ensures tight timing margins in synchronous pipelines and register-based data paths. |
| Operating Temperature | –55°C to +125°C - qualified for aerospace, automotive under-hood, and military-grade embedded applications. |
| Input Hysteresis | Present on clock inputs - suppresses false triggering from EMI or slow-rising signals in noisy environments. |
| Fanout Capability | 10 LSTTL loads - reduces need for buffer stages when driving legacy TTL logic or multiple downstream gates. |
| Reset Type | Asynchronous active-low - allows immediate state clearing independent of clock edge, critical for system initialization. |
Pinout & Package
CD74HC73M is housed in a 14-pin Small Outline Integrated Circuit (SOIC) package with 8.65 mm × 3.90 mm body size, 1.27 mm lead pitch, and 1.75 mm max height - compatible with standard surface-mount reflow processes (MSL Level-1, 260°C peak).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1CLR̅ (Active-Low Reset) | Asynchronously resets first flip-flop output Q1 to LOW; must be pulled HIGH for normal operation. |
| 2 | 1CLK (Clock Input) | Negative-edge-triggered clock for first flip-flop; hysteresis enhances noise margin on signal edges. |
| 3 | 1J (Data Input) | J input for first flip-flop; controls set behavior on next clock edge when K = 0. |
| 4 | 1K (Data Input) | K input for first flip-flop; controls reset behavior on next clock edge when J = 0. |
| 5 | 1Q̅ (Complement Output) | Inverted output of first flip-flop; provides logical complement for feedback or differential signaling. |
| 6 | 1Q (True Output) | Primary output of first flip-flop; toggles, sets, resets, or holds based on J/K states and clock edge. |
| 7 | GND | Ground reference for all internal circuitry and I/O; requires low-inductance connection to minimize switching noise. |
| 8 | 2Q (True Output) | Primary output of second flip-flop; electrically isolated from first section but shares same supply domain. |
| 9 | 2Q̅ (Complement Output) | Inverted output of second flip-flop; enables dual-output logic without external inverters. |
| 10 | 2K (Data Input) | K input for second flip-flop; functionally identical to Pin 4 but for independent second stage. |
| 11 | 2J (Data Input) | J input for second flip-flop; functionally identical to Pin 3 but for independent second stage. |
| 12 | 2CLK (Clock Input) | Negative-edge-triggered clock for second flip-flop; electrically separate from Pin 2 for independent timing domains. |
| 13 | 2CLR̅ (Active-Low Reset) | Asynchronously resets second flip-flop output Q2 to LOW; independent control from Pin 1. |
| 14 | VCC | Positive supply rail (2–6 V); requires local 0.1 μF bypass capacitor to stabilize during output switching. |
Key Features
| Feature | Design Value |
|---|---|
| Hysteresis on clock inputs | Improves noise immunity by ≥30% input threshold margin and tolerates input rise/fall times up to 1000 ns @ 2 V. |
| Asynchronous active-low reset | Enables deterministic initialization of each flip-flop independently, without waiting for clock edge alignment. |
| Complementary Q/Q̅ outputs | Eliminates need for external inverters in toggle-mode counters or differential bus drivers. |
| Buffered inputs | Reduces capacitive loading effects and ensures consistent timing across multiple fanout branches. |
| Wide supply voltage range | Operates from 2 V to 6 V - supports battery-powered, 3.3 V, and 5 V logic domains without voltage translation. |
Applications
| Industrial PLC Counter Modules | Digital Test Equipment Sequencers |
|---|---|
|
Use Scenario: Incrementing/decrementing position counters in programmable logic controllers using quadrature encoder inputs. IC Role / Device Role / Timing Role: Dual J-K flip-flop configured as synchronous binary counters with reset-on-limit functionality. Use Value: Negative-edge triggering synchronizes cleanly with encoder A/B phase transitions; wide temperature range ensures reliability in factory-floor environments. |
Use Scenario: Generating precise test pattern sequences in automated boundary-scan or functional testers. IC Role / Device Role / Timing Role: State register holding current test step index; reset pins enable rapid sequence restart after fault detection. Use Value: Complementary outputs drive parallel test buses directly; 60 MHz fMAX supports sub-17 ns test cycle resolution. |
| Automotive Body Control Units | Legacy System Logic Upgrades |
|
Use Scenario: Debouncing and latching door lock/unlock commands in vehicle body control modules. IC Role / Device Role / Timing Role: Edge-triggered storage element capturing momentary switch closures while rejecting contact bounce. Use Value: Asynchronous reset clears stale states instantly upon power-up; –55°C to +125°C rating meets AEC-Q100 Grade 1 requirements. |
Use Scenario: Replacing obsolete 74LS73 in legacy instrumentation where power reduction and noise immunity are critical. IC Role / Device Role / Timing Role: Drop-in logic upgrade maintaining identical pinout and truth table behavior. Use Value: 90% lower ICC vs LS logic at 5 V enables thermal budget improvement in densely packed PCBs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual J-K flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD74HCT73M96.A | HCT logic family: 4.5–5.5 V only, TTL-compatible input thresholds (VIH = 2 V min, VIL = 0.8 V max). | Required when interfacing directly with legacy 74LS-series outputs without level shifting. | Select CD74HCT73M96.A only if system uses strict 5 V TTL signaling; otherwise CD74HC73M offers wider supply flexibility. |
| SN74HC73DR | Same HC logic, identical function and pinout, but TI's newer SOIC-14 package with enhanced MSL-1 rating and RoHS-compliant finish. | Preferred for new designs requiring long-term manufacturability and JEDEC-standard reflow compliance. | SN74HC73DR is a direct functional and pinout replacement with improved production support; CD74HC73M is obsolete but available via Aetrix. |
Compared with CD74HC73M, CD74HCT73M96.A trades supply flexibility for guaranteed TTL compatibility, while SN74HC73DR retains full HC functionality with updated packaging and lifecycle status - making it the recommended choice for new designs requiring long-term sourcing.
Availability
CD74HC73M is available at Aetrix Electronics and suitable for industrial PLC counter modules, automotive body control units, digital test equipment sequencers, and legacy system logic upgrades requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for CD74HC73M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in high-reliability IC design and manufacturing.
The CD74HC73M belongs to TI's legacy HC logic family - engineered for low-power, high-noise-immunity digital control in harsh environments, targeting industrial automation, aerospace, and automotive subsystems.
FAQ
What is the supply voltage range supported by CD74HC73M?
CD74HC73M operates from 2 V to 6 V DC, with guaranteed performance across the full –55°C to +125°C temperature range. At 2 V, it supports up to 4 MHz clock frequency; at 6 V, maximum fMAX reaches 35 MHz with 50 pF load. This wide range allows direct integration into mixed-voltage systems without external regulators or level shifters.
Does CD74HC73M have hysteresis on its clock inputs?
Yes, CD74HC73M includes built-in hysteresis on both clock inputs (Pins 2 and 12), providing improved noise immunity and enabling reliable operation with slow-rising or noisy clock signals. This feature ensures stable triggering even when input rise/fall times reach 1000 ns at 2 V supply, reducing susceptibility to false edges in electrically noisy environments.
Can CD74HC73M replace 74LS73 in existing designs?
CD74HC73M can replace 74LS73 in most cases due to identical pinout, truth table, and negative-edge-triggered J-K functionality. However, note that CD74HC73M has higher input impedance and lower power consumption, so pull-up/down resistors may require adjustment. Also, verify that the 2–6 V supply range aligns with the target system's voltage rails.
What is the meaning of the "M" suffix in CD74HC73M?
The "M" in CD74HC73M denotes the SOIC (Small Outline Integrated Circuit) package type per TI's ordering nomenclature. Specifically, CD74HC73M corresponds to the obsolete SOIC-14 variant, while active versions use suffixes like "M96.A" - indicating tape-and-reel packaging (2500 pcs/reel), RoHS compliance, and MSL Level-1 reflow rating.
How does the asynchronous reset function in CD74HC73M?
CD74HC73M features two independent active-low asynchronous reset inputs: Pin 1 (1CLR̅) for the first flip-flop and Pin 13 (2CLR̅) for the second. When either is pulled LOW, the corresponding Q output immediately goes LOW and Q̅ goes HIGH - regardless of clock state or J/K inputs. This enables immediate, clock-independent initialization critical for safety-critical or startup-reset scenarios.
CD74HC73M Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Function:
- Reset
- Type:
- JK Type
- Output Type:
- Complementary
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Clock Frequency:
- 60 MHz
- Max Propagation Delay @ V, Max CL:
- 28ns @ 6V, 50pF
- Trigger Type:
- Negative Edge
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Iq):
- 4 µA
- Input Capacitance:
- 10 pF
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
CD74HC73M FAQ
1.How can I place an order for CD74HC73M through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HC73M on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HC73M reliable?
The price and inventory of CD74HC73M are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HC73M is usually 5 days.
3.What payment methods are accepted for CD74HC73M?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HC73M transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CD74HC73M?
CD74HC73M orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CD74HC73M order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HC73M?
For technical support, including CD74HC73M datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HC73M requirements.
6.How does Aetrix verify that CD74HC73M is sourced from the original manufacturer or authorized distributors?
All CD74HC73M products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HC73M meets industry standards.
7.What is the process for return or replacement of CD74HC73M?
All CD74HC73M units undergo pre-shipment inspection (PSI). If there is an issue with CD74HC73M, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HC73M part is unused and in its original packaging.
Return procedure for CD74HC73M:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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