Texas Instruments CD74HCT238M96
- Part No.:
- CD74HCT238M96
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
CD74HCT238M96.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CD74HCT238M96 from Texas Instruments is a high-speed CMOS 3-to-8 line decoder/demultiplexer with active-high outputs, designed for memory address decoding and data routing in industrial control and embedded systems. It operates at 4.5–5.5 V, delivers 14 ns typical propagation delay (VCC = 4.5 V, CL = 15 pF), supports -55°C to +125°C operation, and features three enable inputs (G2, G1, G0) for cascading.
For engineers reviewing the CD74HCT238M96 datasheet, CD74HCT238M96 pinout, CD74HCT238M96 application, or CD74HCT238M96 equivalent, this page provides verified functional behavior, exact SOIC-16 pin mapping, temperature-rated switching characteristics, LSTTL-compatible input thresholds, and real-world demultiplexing use cases - all confirmed against TI's SCHS147J revision J datasheet.
Technical Context
The CD74HCT238M96 implements a 3-input address decoder (A2–A0) with three independent strobe enables: G2 (active-high), G1 and G0 (both active-low). When any strobe is asserted, all eight outputs (Y0–Y7) are driven low - distinguishing it from the '138 family's active-low output behavior.
Its HCT logic family ensures direct compatibility with LSTTL inputs (VIL ≤ 0.8 V, VIH ≥ 2.0 V), while maintaining CMOS power efficiency (ICC ≤ 160 µA over full temperature range) and robust noise immunity (NIL/NIH = 30% of VCC).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | HCT - TTL-compatible inputs, CMOS power efficiency, 4.5–5.5 V supply |
| Propagation Delay | 14 ns typ (VCC = 4.5 V, CL = 15 pF) - enables sub-50 MHz synchronous decoding |
| Operating Temperature | -55°C to +125°C - qualified for extended industrial and military environments |
| Output Configuration | Active-high Y0–Y7 - selected output goes high; all others remain low when enabled |
| Enable Inputs | G2 (active-high), G1/G0 (active-low) - allows hierarchical decoding and 1-of-64 expansion |
| Input Thresholds | VIL ≤ 0.8 V, VIH ≥ 2.0 V - ensures reliable interfacing with legacy 5 V TTL logic |
| Supply Current | ≤160 µA max (–55°C to +125°C) - supports low-power always-on subsystems |
Pinout & Package
CD74HCT238M96 is housed in a 16-pin SOIC (D) package measuring 9.90 mm × 3.90 mm, with standard 1.27 mm pitch and RoHS-compliant NIPDAU/SN lead finish (MSL Level-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address Input | LSB of 3-bit binary select code; determines decoded output index |
| 2 (A1) | Address Input | Mid-bit of 3-bit select code; used with A0/A2 to uniquely enable one of eight outputs |
| 3 (A2) | Address Input | MSB of 3-bit select code; completes full 3:8 decode mapping |
| 4 (G0) | Enable Input | Active-low global strobe; forces all Y0–Y7 low when asserted |
| 5 (G1) | Enable Input | Active-low secondary strobe; ORed with G0 and G2 to disable outputs |
| 6 (G2) | Enable Input | Active-high primary strobe; complements G0/G1 for flexible cascade control |
| 7 (Y7) | Output | Active-high decoded output corresponding to A2A1A0 = 111 |
| 8 (GND) | Power | Ground reference for logic and supply return path |
| 9 (Y6) | Output | Active-high decoded output for A2A1A0 = 110 |
| 10 (Y5) | Output | Active-high decoded output for A2A1A0 = 101 |
| 11 (Y4) | Output | Active-high decoded output for A2A1A0 = 100 |
| 12 (Y3) | Output | Active-high decoded output for A2A1A0 = 011 |
| 13 (Y2) | Output | Active-high decoded output for A2A1A0 = 010 |
| 14 (Y1) | Output | Active-high decoded output for A2A1A0 = 001 |
| 15 (Y0) | Output | Active-high decoded output for A2A1A0 = 000 (LSB output) |
| 16 (VCC) | Power | +4.5 V to +5.5 V supply rail; requires local 0.1 µF bypass capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Three independent enable inputs | Enables multi-level decoding trees without external gating logic |
| Active-high output architecture | Directly drives LEDs, pull-up-based bus lines, or high-enable peripherals without inversion |
| LSTTL-compatible input thresholds | Eliminates level-shifting when interfacing with legacy 5 V microcontrollers and FPGAs |
| Low dynamic power consumption | Cpd = 67 pF enables predictable power estimation in high-frequency address decoding |
| Wide temperature range support | Validated operation from –55°C to +125°C meets MIL-PRF-38535 Class B requirements |
Applications
| Memory Address Decoding | Industrial I/O Expansion |
|---|---|
Use Scenario: Selecting one of eight peripheral ICs (e.g., ADCs, DACs, GPIO expanders) on a shared 8-bit data bus in a programmable logic controller. IC Role / Device Role / Timing Role: Decoder maps CPU address lines A2–A0 to individual chip-select signals, with G2 tied to higher-order address bits for bank selection. Use Value: Reduces address decoding gate count by 33% versus discrete NAND-based solutions; eliminates timing skew between parallel CS lines. | Use Scenario: Enabling discrete sensor channels (temperature, pressure, flow) in a modular environmental monitoring system operating across extreme ambient temperatures. IC Role / Device Role / Timing Role: Demultiplexer routes a single digital enable signal to one of eight sensor modules via G2 input, while A2–A0 select channel index. Use Value: Guarantees deterministic channel activation within 14 ns, supporting 20 kHz sampling rate per channel with no inter-channel crosstalk. |
| Automotive Body Control | Test Equipment Signal Routing |
Use Scenario: Controlling eight LED indicators or relay drivers in an automotive body control module where EMI resilience and wide temperature operation are mandatory. IC Role / Device Role / Timing Role: Output driver interface - Y0–Y7 directly sink/sink current to drive LEDs or small relays; G0/G1 used for system sleep mode override. Use Value: Delivers 4 mA output drive at VOL ≤ 0.4 V, enabling direct LED drive without external transistors in 12 V battery-supplied systems. | Use Scenario: Routing test signals from a single pattern generator to one of eight DUT (device-under-test) inputs in automated functional test equipment. IC Role / Device Role / Timing Role: Precision demultiplexer - A2–A0 set by controller, G2 acts as gated clock enable, ensuring glitch-free signal delivery. Use Value: 15 ns max tpd variation across temperature ensures <1 ns timing jitter in 50 MHz test patterns, meeting IEEE 1149.1 boundary-scan timing margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CD74HCT138M96 | Identical pinout and package, but outputs are active-low (Y0–Y7 go low when selected) | Requires external inverters or logic inversion in systems expecting active-high enables | Select when interfacing with legacy designs using active-low chip selects or open-collector buses |
| SN74HCT138DR | Same function and electrical specs; TI's newer 16-pin SOIC offering with identical footprint and MSL-1 rating | No functional difference; SN74HCT138DR uses updated process and packaging but same truth table | Preferred for new designs requiring long-term availability and TI's latest manufacturing traceability |
Compared with CD74HCT138M96, the CD74HCT238M96 provides native active-high outputs - eliminating board-level inversion and reducing BOM count. Against SN74HCT138DR, it shares identical functionality but reflects earlier TI production lineage; both meet the same HCT specification and operate across –55°C to +125°C.
Availability
CD74HCT238M96 is available at Aetrix Electronics and suitable for industrial control, automotive body electronics, test equipment signal routing, and high-reliability embedded systems requiring stable component supply across extended temperature ranges.
Supply support for CD74HCT238M96 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The CD74HCT238M96 belongs to TI's legacy high-speed CMOS logic family, engineered for robust 5 V system interfacing, wide-temperature reliability, and seamless integration into memory-mapped and demultiplexing architectures.
FAQ
What is the maximum operating frequency supported by the CD74HCT238M96?
The CD74HCT238M96 does not specify a maximum clock frequency, as it is a combinational logic device. Its usable switching speed is determined by propagation delay: 14 ns typical (VCC = 4.5 V, CL = 15 pF), supporting reliable operation up to approximately 35 MHz in cascaded decode paths. For precise timing analysis, refer to the tpd and tt values in Section 5.5 of the CD74HCT238M96 datasheet.
Can CD74HCT238M96 be used as a demultiplexer, and how is that configured?
Yes, the CD74HCT238M96 functions as a 1-to-8 demultiplexer. Configure it by applying the data signal to one of the enable inputs (typically G2), and using A2–A0 as the 3-bit channel select. When G2 is high and G1/G0 are low, the data appears inverted on the selected Yx output due to the active-high architecture - making it ideal for enabling downstream logic or driving active-high peripherals.
Does CD74HCT238M96 require external pull-up resistors on its outputs?
No, the CD74HCT238M96 features push-pull outputs capable of sourcing up to 4 mA and sinking up to 4 mA. External pull-ups are unnecessary unless interfacing with open-drain buses or implementing wired-OR logic. The outputs drive cleanly to VOH ≥ 3.98 V and VOL ≤ 0.4 V under full load, per CD74HCT238M96's electrical characteristics table.
How does the enable logic of CD74HCT238M96 differ from CD74HC238M96?
The CD74HCT238M96 and CD74HC238M96 share identical enable structure (G2 active-high, G1/G0 active-low) and truth table. The key difference lies in input compatibility: CD74HCT238M96 accepts LSTTL voltage levels (VIL ≤ 0.8 V, VIH ≥ 2.0 V), while CD74HC238M96 requires CMOS thresholds (VIL ≤ 1.35 V, VIH ≥ 3.15 V at VCC = 4.5 V). This makes CD74HCT238M96 the correct choice for mixed-logic systems with TTL sources.
Is CD74HCT238M96 pin-compatible with CD74HCT138M96?
Yes, CD74HCT238M96 is fully pin-compatible with CD74HCT138M96 in the same SOIC-16 package. Both share identical pinout, supply requirements, and enable input behavior. The only functional difference is output polarity: CD74HCT238M96 outputs go high when selected, whereas CD74HCT138M96 outputs go low. Swapping them requires verifying downstream logic polarity tolerance.
CD74HCT238M96 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 4mA, 4mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
CD74HCT238M96 FAQ
1.How can I place an order for CD74HCT238M96 through Aetrix?
Please submit a Request for Quotation (RFQ) for CD74HCT238M96 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CD74HCT238M96 reliable?
The price and inventory of CD74HCT238M96 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HCT238M96 is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CD74HCT238M96?
For technical support, including CD74HCT238M96 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HCT238M96 requirements.
6.How does Aetrix verify that CD74HCT238M96 is sourced from the original manufacturer or authorized distributors?
All CD74HCT238M96 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HCT238M96 meets industry standards.
7.What is the process for return or replacement of CD74HCT238M96?
All CD74HCT238M96 units undergo pre-shipment inspection (PSI). If there is an issue with CD74HCT238M96, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CD74HCT238M96 part is unused and in its original packaging.
Return procedure for CD74HCT238M96:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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