Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments CD74HCT238M96G4

Name: CD74HCT238M96G4
Brand: Texas Instruments
SKU: CD74HCT238M96G4
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: CD74HCT238M96G4

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: CD74HCT238M96G4.pdf

Description:: IC DECODER/DEMUX 1X3:8 16SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:3,325

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

CD74HCT238M96G4 from Texas Instruments is a high-speed CMOS 3-to-8 line decoder/demultiplexer with active-high outputs, operating at 4.5 V to 5.5 V, featuring 14 ns typical propagation delay (V_CC = 5 V, C_L = 15 pF), -55°C to +125°C temperature range, and three enable inputs (G2, G1, G0) for cascading in memory address decoding systems.

For engineers reviewing the CD74HCT238M96G4 datasheet, CD74HCT238M96G4 pinout, CD74HCT238M96G4 application, or CD74HCT238M96G4 equivalent, this device is selected for robust industrial control logic, high-reliability address selection in aerospace avionics, and low-power demultiplexing in extended-temperature instrumentation where TTL-compatible input thresholds and guaranteed active-high output behavior are required.

Technical Context

The CD74HCT238M96G4 implements a 3-input binary address decoder with three independent strobe inputs (G2, G1, G0) that force all eight outputs low when asserted - enabling hierarchical decoding via enable chaining. Its HCT logic family ensures direct LSTTL input compatibility (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V) while delivering CMOS-level power efficiency.

Unlike the '138 variant, the '238 function asserts selected outputs high (Y_n = H) and unselected outputs low (Y_n = L) when enabled - supporting active-high load driving, LED segment selection, and positive-logic bus gating without external inverters.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Family	HCT - TTL-compatible inputs, CMOS outputs, 4.5–5.5 V operation
Propagation Delay (t_pd)	14 ns typ. (5 V, C_L = 15 pF) - enables sub-70 MHz address decode timing in real-time control loops
Output Polarity	Active-high (Y_n = H when selected) - eliminates need for external inverters in LED/display drivers
Operating Temperature	-55°C to +125°C - qualified for military, automotive under-hood, and downhole instrumentation
Input Thresholds	V_IL ≤ 0.8 V, V_IH ≥ 2.0 V - ensures reliable interfacing with legacy 5 V TTL and microcontroller GPIO
Supply Current (I_CC)	≤ 160 µA max (–55°C to +125°C) - supports ultra-low-quiescent-power standby modes
Output Drive	±4 mA (V_OH/V_OL specified) - directly drives 10 LSTTL loads or small-signal MOSFET gates

Pinout & Package

CD74HCT238M96G4 is housed in a 16-pin SOIC (D) package (9.90 mm × 3.90 mm), RoHS-compliant, with NIPDAU lead finish and moisture sensitivity level (MSL) 1 (260°C peak reflow).

Pin/Terminal	Circuit Role	Design Meaning
1 (A0)	Address Input	LSB of 3-bit binary address; determines Y₀–Y₁, Y₂–Y₃, etc. decoding group
2 (A1)	Address Input	Middle bit of address; selects pair of outputs within group defined by A0
3 (A2)	Address Input	MSB of address; selects quadrant (Y₀–Y₃ vs. Y₄–Y₇)
4 (G0)	Enable Input	Active-low strobe; disables all outputs (drives Y₀–Y₇ low) when logic low
5 (G1)	Enable Input	Active-low strobe; second cascade control for multi-chip decode trees
6 (G2)	Enable Input	Active-high strobe; primary global enable for system-level decode activation
7 (Y7)	Output	Active-high decoded output for address 111; sinks current when unselected, sources when selected
8 (GND)	Power	Ground reference for all logic and output stages; requires local 0.1 µF bypass
9 (Y6)	Output	Active-high output for address 110; electrically identical to Y7 in drive capability and timing
10 (Y5)	Output	Active-high output for address 101; shares same fanout and transition specs as all Y_n
11 (Y4)	Output	Active-high output for address 100; used in 4-bit nibble selection with A2–A0
12 (Y3)	Output	Active-high output for address 011; supports demux mode when G2 used as data input
13 (Y2)	Output	Active-high output for address 010; compatible with 7-segment display common-anode drivers
14 (Y1)	Output	Active-high output for address 001; verified for <15 ns skew across all Y_n outputs
15 (Y0)	Output	Active-high output for address 000; lowest-address output, often used as reset or boot-enable signal
16 (V_CC)	Power	+4.5 V to +5.5 V supply; must be decoupled locally with 0.1 µF ceramic capacitor

Key Features

Feature	Design Value
Three independent enable inputs	Enables hierarchical 3:8 → 6:64 cascaded decoding without external logic
Active-high output architecture	Directly interfaces with common-anode LEDs, NMOS pull-down loads, and positive-logic peripherals
TTL-compatible input thresholds	Eliminates level-shifting when connecting to legacy 5 V microcontrollers or FPGA I/O banks
Extended temperature operation	Validated performance over –55°C to +125°C supports deployment in harsh-environment systems
Low dynamic power dissipation	67 pF power-dissipation capacitance enables <1 mW typical active power at 1 MHz toggle rate

Applications

Industrial PLC I/O Expansion	Aerospace Avionics Address Decoding
Use Scenario: Selecting one of eight peripheral modules (ADC, DAC, relay driver) on a backplane using three address lines and three enable signals. IC Role / Device Role: Primary 3:8 address decoder enabling modular I/O expansion with fault-isolated enable control. Use Value: Eliminates discrete gate logic; reduces PCB area by 40% versus NAND-based decode; supports hot-swap detection via G0/G1 monitoring.	Use Scenario: Routing CPU address space to discrete memory banks (SRAM, PROM, configuration EEPROM) in flight control computers. IC Role / Device Role: Memory-mapped address decoder ensuring deterministic access timing under radiation-hardened conditions. Use Value: Guaranteed 14 ns t_pd and -55°C to +125°C operation meet DO-254 Level A timing budgets and environmental qualification.
Automotive Engine Control Unit (ECU)	Test Equipment Signal Routing
Use Scenario: Enabling eight fuel injector drivers sequentially based on crankshaft position encoder output. IC Role / Device Role: Demultiplexer converting 3-bit position code into individual injector enable pulses. Use Value: Active-high outputs directly drive low-side injector FET gates; G2 used as engine-run enable, preventing spurious firing during cranking.	Use Scenario: Switching one of eight calibration reference voltages into a precision ADC channel during automated test sequence. IC Role / Device Role: Precision analog multiplexer controller with glitch-free output transitions. Use Value: Matched propagation delays (<2 ns skew) ensure synchronized sampling; low ICC supports battery-powered portable testers.

Industrial PLC I/O Expansion

Aerospace Avionics Address Decoding

Use Scenario: Selecting one of eight peripheral modules (ADC, DAC, relay driver) on a backplane using three address lines and three enable signals.

IC Role / Device Role: Primary 3:8 address decoder enabling modular I/O expansion with fault-isolated enable control.

Use Value: Eliminates discrete gate logic; reduces PCB area by 40% versus NAND-based decode; supports hot-swap detection via G0/G1 monitoring.

Use Scenario: Routing CPU address space to discrete memory banks (SRAM, PROM, configuration EEPROM) in flight control computers.

IC Role / Device Role: Memory-mapped address decoder ensuring deterministic access timing under radiation-hardened conditions.

Use Value: Guaranteed 14 ns t_pd and -55°C to +125°C operation meet DO-254 Level A timing budgets and environmental qualification.

Automotive Engine Control Unit (ECU)

Test Equipment Signal Routing

Use Scenario: Enabling eight fuel injector drivers sequentially based on crankshaft position encoder output.

IC Role / Device Role: Demultiplexer converting 3-bit position code into individual injector enable pulses.

Use Value: Active-high outputs directly drive low-side injector FET gates; G2 used as engine-run enable, preventing spurious firing during cranking.

Use Scenario: Switching one of eight calibration reference voltages into a precision ADC channel during automated test sequence.

IC Role / Device Role: Precision analog multiplexer controller with glitch-free output transitions.

Use Value: Matched propagation delays (<2 ns skew) ensure synchronized sampling; low ICC supports battery-powered portable testers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-to-8 decoder applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
CD74HCT138M96G4	Active-low outputs (Y_n = L when selected); identical pinout, timing, and enable structure	Requires external inverters for common-anode LED or NMOS load driving; preferred for bus arbitration where low-active signaling is standard	Select when system uses active-low enable protocols or legacy designs require drop-in replacement of '138 logic
SN74HCT238N	Same function and electrical specs but in PDIP-16 package (25.4 mm × 6.35 mm); no tape-and-reel option	Suitable for prototyping, through-hole boards, or legacy repair; lacks MSL-1 reflow compatibility and compact footprint	Choose for hand-soldered evaluation or field repair where SOIC reflow is unavailable

Compared with CD74HCT138M96G4 and SN74HCT238N, the CD74HCT238M96G4 uniquely delivers active-high decoding in a production-ready, RoHS-compliant SOIC package with MSL-1 reflow support - making it optimal for high-volume, surface-mount industrial and aerospace assemblies requiring minimal board space and guaranteed positive-logic output behavior.

Availability

CD74HCT238M96G4 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, aerospace avionics address decoding, and automotive ECU injector control requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for CD74HCT238M96G4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic ICs, with over 90 years of innovation in high-reliability electronic components.

The CD74HCT238M96G4 belongs to TI's industry-standard High-Speed CMOS Logic family, designed specifically for robust address decoding, memory selection, and data routing in mission-critical industrial, automotive, and defense systems.

FAQ

What is the key functional difference between CD74HCT238M96G4 and CD74HCT138M96G4?

The CD74HCT238M96G4 provides active-high outputs (Y_n = H when selected), whereas CD74HCT138M96G4 provides active-low outputs (Y_n = L when selected). Both share identical pinout, enable structure (G2, G1, G0), propagation delay, and operating specifications. This polarity difference determines interface compatibility with downstream loads - e.g., CD74HCT238M96G4 directly drives common-anode LEDs, while CD74HCT138M96G4 suits open-collector bus systems.

Does CD74HCT238M96G4 support operation at 3.3 V?

No. The CD74HCT238M96G4 is an HCT-family device specified only for 4.5 V to 5.5 V supply operation. Its TTL-compatible input thresholds (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V) are optimized for 5 V systems. For 3.3 V operation, consider HC-family variants like CD74HC238M96G4, which supports 2 V to 6 V but lacks native TTL input compatibility.

Can CD74HCT238M96G4 be used as a demultiplexer?

Yes. The CD74HCT238M96G4 functions as a 1-to-8 demultiplexer when one strobe input (typically G2) is used as the data input, while A2–A0 select the destination output. When G2 is high and G1/G0 are low, the data applied to G2 appears inverted on the selected Y_n output due to the active-high architecture - enabling clean signal routing in test equipment and communication interfaces.

What is the maximum output sink/source current for CD74HCT238M96G4?

The CD74HCT238M96G4 is rated for ±4 mA DC output current per Y_n pin under recommended operating conditions (V_CC = 4.5–5.5 V, T_A = –55°C to +125°C). This allows direct driving of 10 LSTTL loads or small-signal MOSFET gates. Exceeding ±4 mA risks violating V_OH/V_OL specifications and may degrade long-term reliability.

Is CD74HCT238M96G4 pin-compatible with other packages in the same family?

Yes - the CD74HCT238M96G4 (SOIC-16) shares identical pinout and functionality with CD74HCT238E (PDIP-16) and CD74HCT238PWR (TSSOP-16). All variants use the same 16-pin arrangement: A0–A2, G0–G2, Y0–Y7, V_CC, and GND in identical positions. This enables direct package substitution during design iteration or manufacturing optimization without PCB changes.

CD74HCT238M96G4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74HCT

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Type:: Decoder/Demultiplexer

Circuit:: 1 x 3:8

Independent Circuits:: 1

Current - Output High, Low:: 4mA, 4mA

Voltage Supply Source:: Single Supply

Voltage - Supply:: 4.5V ~ 5.5V

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

CD74HCT238M96G4 FAQ

1.How can I place an order for CD74HCT238M96G4 through Aetrix?

Please submit a Request for Quotation (RFQ) for CD74HCT238M96G4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for CD74HCT238M96G4 reliable?

The price and inventory of CD74HCT238M96G4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HCT238M96G4 is usually 5 days.

3.What payment methods are accepted for CD74HCT238M96G4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HCT238M96G4 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for CD74HCT238M96G4?

CD74HCT238M96G4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your CD74HCT238M96G4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for CD74HCT238M96G4?

For technical support, including CD74HCT238M96G4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HCT238M96G4 requirements.

6.How does Aetrix verify that CD74HCT238M96G4 is sourced from the original manufacturer or authorized distributors?

All CD74HCT238M96G4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HCT238M96G4 meets industry standards.

7.What is the process for return or replacement of CD74HCT238M96G4?

All CD74HCT238M96G4 units undergo pre-shipment inspection (PSI). If there is an issue with CD74HCT238M96G4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The CD74HCT238M96G4 part is unused and in its original packaging.

Return procedure for CD74HCT238M96G4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…