Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Multivibrators

Texas Instruments CD74HCT423M96

Name: CD74HCT423M96
Brand: Texas Instruments
SKU: CD74HCT423M96
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: CD74HCT423M96

Manufacturer:: Texas Instruments

Category:: Multivibrators

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: CD74HCT423M96.pdf

Description:: IC MULTIVIBRATOR 25NS 16SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,450

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

CD74HCT423M96 from Texas Instruments is a dual retriggerable monostable multivibrator with independent resets, designed for precise pulse generation and timing control in digital systems. It operates from 4.5 V to 5.5 V, features Schmitt-trigger inputs on both A and B trigger pins, supports trailing-edge (A) and leading-edge (B) triggering, and delivers buffered Q and Q̅ outputs with pulse widths adjustable via external RX/CX components - widely used in debounce circuits, event timing, and waveform shaping.

For engineers reviewing the CD74HCT423M96 datasheet, CD74HCT423M96 pinout, CD74HCT423M96 application, or CD74HCT423M96 equivalent, key selection criteria include its HCT-level LSTTL input compatibility (VIH ≥ 2 V, VIL ≤ 0.8 V), wide -55°C to +125°C operating range, SOIC-16 package, and reset-terminatable output pulse functionality.

Technical Context

The CD74HCT423M96 implements two independent monostable multivibrators, each with separate A (trailing-edge), B (leading-edge), and R (active-low reset) inputs. Triggering is edge-sensitive and retriggerable: a new valid edge during an active output pulse extends the width, while a LOW on R terminates it immediately.

Timing is externally controlled by resistor RX and capacitor CX, with pulse width calculated as t_W = 0.45 × R_XC_X at V_CC = 5 V. The device uses CMOS logic with TTL-compatible inputs, ensuring robust noise immunity (NIL/NIH = 30% of V_CC) and low quiescent current (ICC ≤ 160 µA over full temperature range).

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	4.5 V to 5.5 V - ensures direct compatibility with standard 5 V TTL logic buses without level shifting.
Input Compatibility	LSTTL-compatible: VIH ≥ 2 V (min), VIL ≤ 0.8 V (max) - eliminates need for external interface buffers when driving from legacy TTL sources.
Operating Temperature	-55°C to +125°C - supports deployment in aerospace, industrial control, and automotive under-hood applications.
Output Pulse Width	Adjustable from ~0.1 µs to >10 s via RX (≥5 kΩ) and CX (0 pF to 10 µF) - enables flexible timing across sensor interfacing, delay generation, and system synchronization.
Propagation Delay	t_PLH/t_PHL ≤ 90 ns (max) at V_CC = 5 V, CL = 50 pF - guarantees sub-100 ns response for real-time trigger conditioning.
Reset Function	Active-low asynchronous R input terminates output pulse immediately - provides deterministic abort capability for safety-critical or fault-recovery timing sequences.
Input Structure	Schmitt-trigger A/B inputs - rejects noise-induced false triggers on slow-rising/falling signals (e.g., mechanical switch bounce, long traces).

Pinout & Package

CD74HCT423M96 is housed in a 16-pin SOIC (D) package (JEDEC MS-012AC, 3.9 mm body width, 1.75 mm height), RoHS-compliant with NiPdAu lead finish and moisture sensitivity level (MSL) Level-1 (unlimited floor life at ≤30°C/60% RH).

Pin/Terminal	Circuit Role	Design Meaning
1A, 2A	Trailing-edge trigger input	Monostable triggers on falling edge; immune to noise due to Schmitt threshold.
1B, 2B	Leading-edge trigger input	Monostable triggers on rising edge; enables edge-selective event capture.
1R, 2R	Active-low asynchronous reset	Drives Q/Q̅ low immediately - no propagation delay; critical for emergency pulse termination.
1Q, 2Q	Inverted output	Complementary buffered output; drives 10 LSTTL loads over full temperature range.
1Q̅, 2Q̅	Non-inverted output	Primary buffered output; fanout matches standard TTL drive requirements.
1CX, 2CX	External timing capacitor connection	Connects to ground; sets pulse width with RX; 0 pF minimum allows minimal-width pulses.
1RXCX, 2RXCX	External timing resistor connection	Connects between V_CC and CX; minimum 5 kΩ ensures stable timing and avoids excessive current draw.
V_CC, GND	Power supply terminals	Single 5 V supply; decoupling capacitor (0.1 µF) required near V_CC pin for noise suppression.

Key Features

Feature	Design Value
Retriggerable operation	Enables dynamic pulse extension during ongoing timing cycles - essential for variable-duration event windows (e.g., serial bit sampling, burst detection).
Dual independent monostables	Allows concurrent timing of unrelated events (e.g., watchdog timeout + sensor acquisition window) without cross-talk or shared resource contention.
Edge-selective triggering (A/B)	Eliminates need for external edge-detection logic - reduces component count and PCB area in mixed-edge signal environments.
Overriding reset (R)	Provides hardware-level pulse abortion - satisfies functional safety requirements where software-controlled delays are insufficiently deterministic.
HCT logic family	Combines CMOS power efficiency (<160 µA ICC max) with TTL input thresholds - simplifies migration from legacy 74LS designs without redesigning driver stages.

Applications

Industrial Motor Control	Automotive Body Electronics
Use Scenario: Debouncing mechanical relay contacts and limit switches in PLC I/O modules. IC Role / Device Role: Monostable multivibrator generating clean, fixed-duration logic pulses after switch closure/opening. Use Value: Eliminates contact bounce artifacts using Schmitt-trigger inputs and configurable RC timing - improves system reliability without firmware intervention.	Use Scenario: Timing door lock actuation sequences and hazard light flash intervals in body control modules (BCMs). IC Role / Device Role: Dual timing generator producing synchronized ON/OFF durations for solenoid drivers and LED drivers. Use Value: Independent A/B edge triggering allows single IC to manage both rising-edge (unlock request) and falling-edge (lock confirmation) events - reduces BOM count.
Test & Measurement Equipment	Avionics Signal Conditioning
Use Scenario: Generating precise gate pulses for analog-to-digital conversion sampling windows in data acquisition systems. IC Role / Device Role: Retriggerable one-shot producing jitter-free sample-enable pulses synchronized to external triggers. Use Value: Reset override ensures immediate pulse termination if acquisition must be aborted - prevents data corruption during fault conditions.	Use Scenario: Converting noisy discrete aircraft sensor signals (e.g., flap position, landing gear proximity) into clean digital timing references. IC Role / Device Role: Edge-triggered pulse stretcher with extended temperature range support (-55°C to +125°C). Use Value: Guaranteed operation across extreme ambient conditions and immunity to EMI-induced false triggers - meets DO-160 Section 20 radiated susceptibility requirements.

Industrial Motor Control

Automotive Body Electronics

Use Scenario: Debouncing mechanical relay contacts and limit switches in PLC I/O modules.

IC Role / Device Role: Monostable multivibrator generating clean, fixed-duration logic pulses after switch closure/opening.

Use Value: Eliminates contact bounce artifacts using Schmitt-trigger inputs and configurable RC timing - improves system reliability without firmware intervention.

Use Scenario: Timing door lock actuation sequences and hazard light flash intervals in body control modules (BCMs).

IC Role / Device Role: Dual timing generator producing synchronized ON/OFF durations for solenoid drivers and LED drivers.

Use Value: Independent A/B edge triggering allows single IC to manage both rising-edge (unlock request) and falling-edge (lock confirmation) events - reduces BOM count.

Test & Measurement Equipment

Avionics Signal Conditioning

Use Scenario: Generating precise gate pulses for analog-to-digital conversion sampling windows in data acquisition systems.

IC Role / Device Role: Retriggerable one-shot producing jitter-free sample-enable pulses synchronized to external triggers.

Use Value: Reset override ensures immediate pulse termination if acquisition must be aborted - prevents data corruption during fault conditions.

Use Scenario: Converting noisy discrete aircraft sensor signals (e.g., flap position, landing gear proximity) into clean digital timing references.

IC Role / Device Role: Edge-triggered pulse stretcher with extended temperature range support (-55°C to +125°C).

Use Value: Guaranteed operation across extreme ambient conditions and immunity to EMI-induced false triggers - meets DO-160 Section 20 radiated susceptibility requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual monostable multivibrator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
CD74HCT123M96	Supports negative-to-positive reset pulse triggering; CD74HCT423M96 does not.	Required where reset must be edge-triggered rather than level-sensitive.	Select CD74HCT123M96 only if system design mandates reset edge-sensitivity; otherwise CD74HCT423M96 offers simpler level-based reset control.
SN74HCT123DR	Same HCT logic family, identical pinout, but manufactured by TI with different packaging (tape-and-reel, SOIC-16) and updated MSL rating (Level-1-260°C).	No functional difference; suitable for new designs requiring latest process and qualification.	SN74HCT123DR is a functionally identical drop-in replacement with enhanced manufacturability - preferred for high-volume production programs.

Compared with CD74HCT123M96, the CD74HCT423M96 provides simpler level-sensitive reset behavior ideal for deterministic pulse abortion, while SN74HCT123DR offers identical functionality with modern packaging and lifecycle support - making CD74HCT423M96 optimal for legacy-compatible designs requiring proven reliability.

Availability

CD74HCT423M96 is available at Aetrix Electronics and suitable for industrial motor control, automotive body electronics, and avionics signal conditioning requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for CD74HCT423M96 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 90 years of innovation in precision timing, power management, and logic devices.

The CD74HCT423M96 belongs to TI's legacy HCT logic family, engineered for seamless interoperability with TTL systems while delivering CMOS power efficiency - targeting industrial, aerospace, and automotive applications demanding wide temperature operation and deterministic timing.

FAQ

What is the minimum external resistor value supported by CD74HCT423M96?

The CD74HCT423M96 specifies a typical minimum external resistance R_X of 5 kΩ. Using lower values may cause excessive current draw, timing inaccuracies, or reduced output drive capability. Designers should verify stability with actual R_X/C_X combinations per the datasheet's t_W = 0.45 × R_XC_X equation and ensure thermal limits are respected in continuous operation. The CD74HCT423M96 datasheet confirms this value in the "Electrical Characteristics" section under timing parameter notes.

Does CD74HCT423M96 support retriggering during an active output pulse?

Yes, the CD74HCT423M96 is explicitly retriggerable: a valid edge on either A or B input during an active output pulse extends the total pulse width. This behavior is confirmed in the device description ("retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature") and truth table. The CD74HCT423M96 maintains output state until the extended time elapses or reset is asserted - critical for applications like burst-mode signal capture.

Can CD74HCT423M96 operate at 3.3 V supply voltage?

No, the CD74HCT423M96 is specified only for 4.5 V to 5.5 V operation. Its HCT family design requires TTL-compatible input thresholds (VIH ≥ 2 V, VIL ≤ 0.8 V), which are guaranteed only within this range. At 3.3 V, input recognition fails - VIH would exceed 2 V (60% of 3.3 V), risking logic misinterpretation. For 3.3 V systems, consider HC-family variants like CD74HC423M96, which supports 2 V to 6 V. The CD74HCT423M96 datasheet clearly defines this voltage range in the "Operating Conditions" table.

What is the maximum output pulse width achievable with CD74HCT423M96?

The CD74HCT423M96 has no inherent upper limit on output pulse width - it is determined solely by external R_X and C_X values. With R_X = 10 MΩ and C_X = 10 µF, t_W ≈ 45 seconds. Practical limits arise from capacitor leakage (affecting long-duration accuracy) and resistor tolerance. The CD74HCT423M96 datasheet states "adjustment of R_X and C_X provides a wide range of output-pulse widths", and the timing equation t_W = 0.45 × R_XC_X applies across the full specified component range.

How does the reset function behave on CD74HCT423M96?

The reset input (R) on CD74HCT423M96 is active-low and asynchronous: asserting R LOW immediately forces Q HIGH and Q̅ LOW, terminating the output pulse regardless of timing state. This override occurs with propagation delay ≤ 72 ns (max at V_CC = 5 V), as specified in switching characteristics. The CD74HCT423M96 truth table confirms R takes priority over A/B inputs - a key distinction from the 123-series, which requires edge-triggered reset. This behavior enables fail-safe timing abort in safety-critical systems.

CD74HCT423M96 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74HCT

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Logic Type:: Monostable

Independent Circuits:: 2

Schmitt Trigger Input:: No

Propagation Delay:: 25 ns

Current - Output High, Low:: 4mA, 4mA

Voltage - Supply:: 4.5 V ~ 5.5 V

Operating Temperature:: -55°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

CD74HCT423M96 FAQ

1.How can I place an order for CD74HCT423M96 through Aetrix?

Please submit a Request for Quotation (RFQ) for CD74HCT423M96 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for CD74HCT423M96 reliable?

The price and inventory of CD74HCT423M96 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CD74HCT423M96 is usually 5 days.

3.What payment methods are accepted for CD74HCT423M96?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CD74HCT423M96 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for CD74HCT423M96?

CD74HCT423M96 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your CD74HCT423M96 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for CD74HCT423M96?

For technical support, including CD74HCT423M96 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CD74HCT423M96 requirements.

6.How does Aetrix verify that CD74HCT423M96 is sourced from the original manufacturer or authorized distributors?

All CD74HCT423M96 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CD74HCT423M96 meets industry standards.

7.What is the process for return or replacement of CD74HCT423M96?

All CD74HCT423M96 units undergo pre-shipment inspection (PSI). If there is an issue with CD74HCT423M96, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The CD74HCT423M96 part is unused and in its original packaging.

Return procedure for CD74HCT423M96:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…