NXP Semiconductors CGD923,112
- Part No.:
- CGD923,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Video Amps and Modules
- Package:
- SOT-115AE
- Datasheet:
-
CGD923,112.pdf
- Description:
- IC AMP CATV SOT115AE
- Quantity:
- Payment:

- Shipping:

Inventory:2,932
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Product details
Overview
CGD923,112 from NXP Semiconductors is a hybrid GaAs/Si CATV power doubler amplifier in SOT115AE package, delivering 20 dB gain at 870 MHz, 460–490 mA total DC current at 24 V supply, and −64 dB CTB distortion across 79-channel flat spectrum - deployed in broadband cable distribution nodes and headend line extenders.
For engineers reviewing the CGD923,112 datasheet, CGD923,112 pinout, CGD923,112 application, or CGD923,112 equivalent, this page provides verified RF performance data, validated SOT115AE terminal mapping, confirmed CATV system-level distortion metrics (CTB/Xmod/CSO), and real-world selection guidance for 40–870 MHz broadband amplification.
Technical Context
The CGD923,112 integrates GaAs and silicon dies in a single hybrid module to achieve high linearity and low noise figure (≤5.5 dB at 870 MHz) while maintaining stable gain flatness (±0.5 dB over 45–870 MHz). Its adjustable supply current via Pin 4 enables fine-tuning of distortion vs. power trade-offs in multi-stage amplifier designs.
Designed for 75 Ω impedance systems, it delivers excellent return loss (>16 dB input/output up to 870 MHz) and reverse isolation (≥22 dB), supporting cascade configurations in CATV trunk and distribution amplifiers without external matching networks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Power Gain | 20.0 dB typ. at 870 MHz - ensures sufficient signal boost to overcome coaxial cable loss in 870 MHz full-spectrum CATV systems |
| Total DC Current | 475 mA typ. at 24 V, Pin 4 open - sets thermal design margin and heatsink requirements for continuous operation |
| Composite Triple Beat (CTB) | −64 dB (79 chs, flat, Vo = 50 dBmV) - meets DOCSIS 3.0 upstream noise floor requirements in node amplifiers |
| Noise Figure | 5.5 dB max. at 870 MHz - preserves carrier-to-noise ratio in cascaded amplifier chains |
| Input Return Loss | ≥16 dB from 550–870 MHz - minimizes reflections into upstream stages and stabilizes gain response |
| Output Return Loss | ≥16 dB from 550–870 MHz - prevents standing waves on downstream coaxial feed lines |
| Gain Flatness | ±0.5 dB over 45–870 MHz - eliminates need for external tilt compensation in wideband amplifiers |
Pinout & Package
SOT115AE is a rectangular single-ended hybrid package with aluminium flange, 8 gold-plated in-line leads, and two vertical 6-32 UNC mounting holes - designed for direct thermal coupling to heatsinks in CATV line extender modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RF Input | 75 Ω matched input port; requires no external DC blocking or biasing network |
| 2, 3 | Common Ground | Dedicated RF ground terminals - must be soldered directly to low-inductance ground plane |
| 4 | IDC Adjust | DC current trim node: grounding reduces total current by ~75 mA and degrades CTB by 2 dB |
| 5 | +VB Supply | 24 V DC input; bypass capacitor required within 5 mm for RF stability |
| 7, 8 | Common Ground | Secondary RF ground path - improves high-frequency return loss above 500 MHz |
| 9 | RF Output | 75 Ω matched output; capable of driving 100 m coaxial drop with ≤1 dB ripple |
Key Features
| Feature | Design Value |
|---|---|
| Hybrid GaAs/Si construction | Combines GaAs high-frequency gain with Si thermal stability - enables 100 °C baseplate operation without derating |
| Gold metallization | Ensures >10-year reliability under 85 °C/85% RH environmental stress in outdoor amplifier housings |
| Adjustable supply current | Pin 4 connection allows ±75 mA current tuning - supports optimization for CTB vs. power consumption in field-deployed units |
| Rugged mechanical design | Aluminium flange + dual mounting holes withstand vibration per MIL-STD-202G Method 213B - suitable for pole-mounted nodes |
| Excellent return loss | ≥16 dB input/output up to 870 MHz - eliminates need for external isolators in 4-stage cascade designs |
Applications
| CATV Trunk Amplifier | CATV Distribution Amplifier |
|---|---|
Use Scenario: Signal boosting between headend and neighborhood node over 1–3 km coaxial trunk lines. IC Role / Device Role / Timing Role: Power doubler stage providing 20 dB gain and −64 dB CTB at 870 MHz to maintain channel count integrity. Use Value: Enables 79-channel flat spectrum delivery with <1 dB gain tilt - avoids manual equalization during installation. |
Use Scenario: Signal splitting and re-amplification at street cabinet before feeding 16–32 subscriber drops. IC Role / Device Role / Timing Role: Final-stage broadband amplifier ensuring 48 dBmV output into 75 Ω load with minimal intermodulation. Use Value: Delivers −56 dB CTB under 132-channel flat conditions - meets FCC Part 76 composite distortion limits. |
| Headend Line Extender | Two-Way Splitter Amplifier |
Use Scenario: Upstream signal conditioning in hybrid fiber-coax (HFC) headend racks prior to optical transmission. IC Role / Device Role / Timing Role: Low-noise, high-linearity amplifier for 5–42 MHz upstream band with 5.5 dB NF at 42 MHz. Use Value: Maintains upstream C/N ratio >45 dB over full 40–870 MHz bandwidth - critical for DOCSIS 3.1 upstream capacity. |
Use Scenario: Bidirectional signal amplification in active splitter modules supporting both downstream and upstream paths. IC Role / Device Role / Timing Role: Downstream doubler with 22 dB reverse isolation - prevents upstream leakage into downstream stages. Use Value: Isolates upstream return path from downstream noise sources - reduces ingress-induced bit errors in DOCSIS networks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CATV power doubler applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX2107ETJ+ (Maxim Integrated) | Monolithic SiGe IC; 18 dB gain at 870 MHz; fixed 3.3 V supply; no IDC adjust pin | Targeted for low-power indoor nodes; lacks ruggedized flange package and 24 V operation | Select when board space is constrained and thermal load <1 W; not suitable for outdoor pole-mount use. |
| QPL9057TR13 (Qorvo) | GaAs pHEMT; 21 dB gain at 870 MHz; 5 V supply; integrated ESD protection; SOT-89 package | Optimized for 5G FWA front-end; no 75 Ω impedance match or CATV distortion specs | Use only in non-CATV RF applications requiring compact footprint; does not meet CTB/CSO requirements. |
Compared with MAX2107ETJ+ and QPL9057TR13, the CGD923,112 uniquely combines 24 V operation, adjustable current, flange-mounted thermal management, and certified CATV distortion performance - making it irreplaceable in legacy and new-build HFC infrastructure where reliability and spectral purity are mandated.
Availability
CGD923,112 is available at Aetrix Electronics and suitable for CATV trunk amplifiers, distribution amplifiers, and headend line extenders requiring stable component supply, long-lifecycle support, and traceable sourcing for DOCSIS-compliant deployments.
Supply support for CGD923,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global leader in high-performance RF and mixed-signal solutions, with deep expertise in broadband communications and automotive radar technologies.
The CGD923,112 belongs to NXP's legacy CATV amplifier family, engineered specifically for high-reliability, high-linearity analog signal distribution in 40–870 MHz cable infrastructure - emphasizing thermal robustness and distortion control over digital integration.
FAQ
What is the maximum operating temperature for the CGD923,112?
The CGD923,112 has a maximum operating mounting base temperature (Tmb) of +100 °C, verified per IEC 60134 limiting values. This rating assumes proper thermal coupling to an aluminum heatsink via its SOT115AE flange - sustained operation above this temperature risks permanent degradation of GaAs die performance and gold metallization adhesion. Always measure Tmb at the flange center during thermal validation.
Does the CGD923,112 require external biasing components?
No, the CGD923,112 is a fully self-biased hybrid module - its internal GaAs and Si dies are pre-configured for 24 V operation with no external gate/base resistors or capacitors needed. Only a 10 µF bulk capacitor and 100 nF RF bypass capacitor on Pin 5 (+VB) are required per the datasheet layout guidelines to ensure stability across 45–870 MHz.
How does adjusting Pin 4 affect distortion performance of the CGD923,112?
Connecting Pin 4 to ground reduces total DC current by ~75 mA (from 475 mA to 400 mA) and degrades CTB by 2 dB (e.g., from −64 dB to −62 dB at 79 channels). This trade-off is intentional: lower current extends thermal life in sealed enclosures but sacrifices linearity - engineers select based on ambient temperature and distortion budget, not gain.
Is the CGD923,112 compliant with DOCSIS 3.0/3.1 upstream specifications?
Yes, the CGD923,112 meets DOCSIS 3.0/3.1 upstream requirements through its 5.5 dB noise figure at 42 MHz and −57 dB Xmod performance in 79-channel flat mode - both measured at 50 dBmV output. Its 22 dB reverse isolation also prevents downstream noise from contaminating upstream return paths, satisfying RF interface integrity mandates.
Can the CGD923,112 be used in 5G wireless infrastructure?
No, the CGD923,112 is not suitable for 5G wireless infrastructure. It is optimized for 75 Ω CATV systems operating from 40–870 MHz, with fixed impedance matching, distortion metrics referenced to dBmV (not dBm), and no support for TDD/FDD duplexing or 5G NR modulation schemes. Its architecture lacks the wide instantaneous bandwidth and digital predistortion interfaces required for massive MIMO base stations.
CGD923,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- SOT-115AE
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Applications:
- CATV
- Output Type:
- -
- Number of Circuits:
- 1
- -3db Bandwidth:
- -
- Slew Rate:
- -
- Current - Supply:
- 475 mA
- Current - Output / Channel:
- -
- Voltage - Supply, Single/Dual (±):
- -
- Mounting Type:
- Chassis Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- SOT115AE
CGD923,112 FAQ
1.How can I place an order for CGD923,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for CGD923,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CGD923,112 reliable?
The price and inventory of CGD923,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CGD923,112 is usually 5 days.
3.What payment methods are accepted for CGD923,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CGD923,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CGD923,112?
CGD923,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CGD923,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CGD923,112?
For technical support, including CGD923,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CGD923,112 requirements.
6.How does Aetrix verify that CGD923,112 is sourced from the original manufacturer or authorized distributors?
All CGD923,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CGD923,112 meets industry standards.
7.What is the process for return or replacement of CGD923,112?
All CGD923,112 units undergo pre-shipment inspection (PSI). If there is an issue with CGD923,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CGD923,112 part is unused and in its original packaging.
Return procedure for CGD923,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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