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Infineon Technologies CHL8104-09CRT
- Part No.:
- CHL8104-09CRT
- Manufacturer:
- Infineon Technologies
- Category:
- DC DC Switching Controllers
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
CHL8104-09CRT.pdf
- Description:
- IC REG BUCK 40VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,744
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Product details
Overview
CHL8104-09CRT from Infineon Technologies is a dual-loop, 4+1-phase digital buck controller for CPU voltage regulation in Intel® VR12 and AMD® SVI systems. It supports independent per-phase switching frequencies (200 kHz–1.2 MHz), IR Dynamic Phase Control (DPC), Adaptive Transient Algorithm (ATA), and dual OCP with programmable I²C addressing. Used in high-performance desktop CPU VRMs.
For engineers reviewing the CHL8104-09CRT datasheet, CHL8104-09CRT pinout, CHL8104-09CRT application, or CHL8104-09CRT equivalent, key selection criteria include VR12/SVI compliance, dual-loop telemetry via I²C, thermal protection with VRHOT#, MTP-configurable fault thresholds, and 40-pin 6×6 mm QFN package layout compatibility with CHL8325A/B.
Technical Context
The CHL8104-09CRT implements two independent digital PWM control loops-one for main CPU core (4-phase) and one for integrated GPU or I/O (1-phase)-with fully configurable I²C registers for loop parameters, OVP/UVP/OCP thresholds, and ATA response tuning. It integrates thermistor-based temperature sensing and generates VRHOT# flag upon thermal violation.
Its IR Efficiency Shaping architecture enables dynamic phase shedding, 1-phase operation, and active diode emulation at light loads. The controller accepts SVI2 clock/data signals and supports both Intel Mode (SVI2) and AMD Mode (SVI) via pin-strapped configuration, with dedicated SMBus interface pins (SMB_DAT/SMB_CLK) and security enable (ENABLE/ADDR/PROT/EN_L2).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Control Architecture | Dual-loop digital PWM with independent 200 kHz–1.2 MHz per-phase frequency programming |
| Phase Configuration | 4+1-phase: 4 phases for CPU core, 1 dedicated phase for GPU/I/O rail |
| I²C Interface | Configurable slave address via ADDR pin; supports telemetry readback and real-time voltage/current/temp monitoring |
| Fault Protection | Per-loop OVP, UVP, OCP; system-level OTP with VRHOT# assertion and thermistor input (TSEN1/TSEN2) |
| Memory | Multiple Time Programmable (MTP) non-volatile memory for custom loop settings, eliminating external EEPROM |
| Supply Voltage | 3.3 V ±10%/−15%; operates from 0°C to +85°C ambient |
| Package | 40-pin QFN, 6 mm × 6 mm × 0.9 mm, exposed thermal pad, RoHS-compliant |
Pinout & Package
CHL8104-09CRT is housed in a 40-pin, 6 mm × 6 mm, 0.9 mm height QFN package with exposed thermal pad. Pin numbering follows standard top-view convention (pin 1 marked by dot).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PWM1–PWM4 | Phase gate drive outputs | Drive external high-side MOSFETs for 4-phase CPU core rail; logic-level compatible with 3.3 V tri-state drivers |
| PWM_L2 | Secondary loop gate drive | Drives single-phase GPU/I/O rail; independent frequency and transient response tuning |
| ISEN1–ISEN4 / ISEN_L2 | Current sense inputs | Accept differential current-sense signals from DCR or shunt resistors; enable per-phase OCP with programmable threshold |
| VSEN / VSEN_L2 | Output voltage feedback | High-impedance analog inputs for closed-loop voltage regulation of primary and secondary rails |
| SMB_DAT / SMB_CLK | I²C bidirectional interface | Support configuration, telemetry readback (VOUT, IOUT, TEMP), and firmware updates via standard SMBus protocol |
| VRHOT# | Thermal alert output | Open-drain active-low signal asserted when die temperature exceeds programmed OTP threshold |
| ENABLE / ADDR/PROT/EN_L2 | Configuration & security control | Multi-function pin: enables device, selects I²C address, activates security lock, and enables secondary loop |
Key Features
| Feature | Design Value |
|---|---|
| IR Dynamic Phase Control (DPC) | Automatically adds/drops active phases based on load current to maintain peak efficiency across 1–100% load range |
| Adaptive Transient Algorithm (ATA) | Proprietary non-linear digital PWM reduces required bulk capacitance by >30% versus fixed-gain controllers |
| Dual OCP with independent thresholds | Enables asymmetric current limiting per rail-e.g., 120 A on CPU core, 30 A on GPU rail-without external components |
| Pin-programmable I²C address | Three-state ADDR pin supports up to 8 unique addresses on shared bus, simplifying multi-rail VRM designs |
| VR12 & SVI2 compliance | Fully implements Intel VR12.0 timing, sequencing, and telemetry requirements plus AMD SVI2 clock/data handshake protocol |
Applications
| High-Performance Desktop CPU VRM | Entry-Level Server DDR Memory VRM |
|---|---|
Use Scenario: Voltage regulation for quad-core+ desktop CPUs with dynamic power states (C-states) and overclocking support. IC Role / Device Role / Timing Role: Dual-loop digital controller managing 4-phase CPU core rail and 1-phase GT graphics rail with synchronized telemetry. Use Value: Enables <50 µs transient response and <±0.5% regulation accuracy under 50 A/µs load steps while reducing bulk capacitor count by 35%. | Use Scenario: DDR4/DDR5 memory subsystem voltage regulation in dual-socket servers with thermal-aware throttling. IC Role / Device Role / Timing Role: Secondary loop configured as standalone 3-phase DDR VDDQ controller using SVI2-compatible interface and TSEN2 thermistor input. Use Value: Delivers stable 1.2 V ±15 mV at 60 A with VRHOT#-triggered throttling before memory IC thermal derating occurs. |
| Overclocking-Enabled Gaming Platform | AMD EPYC™-Based Workstation VRM |
Use Scenario: Enabling user-controlled Vmax override and adaptive voltage-frequency scaling in enthusiast gaming motherboards. IC Role / Device Role / Timing Role: I²C-configured controller accepting real-time voltage commands via BIOS or utility; supports dynamic V/f curve adjustment. Use Value: Allows safe overclocking up to 1.45 V with hardware-enforced OCP and OTA-based overshoot suppression during rapid frequency jumps. | Use Scenario: Multi-rail CPU voltage regulation for AMD EPYC processors requiring SVI2-compliant sequencing and telemetry. IC Role / Device Role / Timing Role: Primary loop manages core VDD, secondary loop handles SoC I/O voltage; both use SVI2 clock/data handshake and shared SMBus. Use Value: Guarantees <100 ms power-good assertion with precise 500 µs sequencing delay between VDD and VDDIO rails per AMD specification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-loop digital multiphase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CHL8103-09CRT | 3+1-phase (not 4+1); lacks ISEN4 and PWM4 pins; identical pinout and firmware compatibility | Suitable for mid-tier CPUs with lower current demand (<80 A core); no support for 4-phase high-end SKUs | Select when cost-sensitive design targets ≤80 A CPU rail with retained VR12/SVI2 compliance |
| ISL6377IRZ | Analog-digital hybrid architecture; no MTP memory; requires external EEPROM for configuration; 40-pin QFN but different pin mapping | Lacks native VRHOT# and thermistor interface; uses analog thermal shutdown instead of digital VRHOT# flag | Choose only if legacy platform reuse mandates ISL63xx footprint and design team has existing EEPROM infrastructure |
Compared with CHL8103-09CRT, CHL8104-09CRT delivers higher peak current capability and full 4-phase scalability; versus ISL6377IRZ, it eliminates external memory, integrates thermal flag signaling, and supports faster I²C telemetry update rates for real-time power management.
Availability
CHL8104-09CRT is available at Aetrix Electronics and suitable for high-performance desktop CPU VRMs, AMD EPYC™ workstation platforms, and overclocking-enabled gaming motherboards requiring stable component supply and long-term lifecycle support.
Supply support for CHL8104-09CRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in digital power controller innovation since 2005.
The CHL8104-09CRT belongs to Infineon's CHL8xxx digital multiphase controller family, designed specifically for high-efficiency, low-latency CPU voltage regulation in VR12- and SVI2-compliant computing platforms.
FAQ
What is the maximum supported switching frequency per phase?
The CHL8104-09CRT supports independent per-phase switching frequencies from 200 kHz to 1.2 MHz, configurable via I²C register writes. This range balances efficiency (lower frequencies) and transient response (higher frequencies), with typical desktop implementations using 600–800 kHz for optimal EMI and thermal performance.
Does CHL8104-09CRT require an external EEPROM for configuration?
No. The device integrates Multiple Time Programmable (MTP) non-volatile memory that stores all configuration parameters-including loop gains, fault thresholds, and ATA settings-eliminating the need for external EEPROM or boot-time configuration from host processor.
How does VRHOT# differ from standard thermal shutdown?
VRHOT# is an open-drain, active-low signal asserted when die temperature exceeds a programmable threshold, enabling system-level thermal throttling without power cycle. Unlike hard thermal shutdown, it allows graceful performance reduction while maintaining system operation and telemetry visibility.
Can CHL8104-09CRT operate in both Intel VR12 and AMD SVI2 modes simultaneously?
No. The device operates in either Intel Mode (SVI2) or AMD Mode (SVI), selected by strapping the MODE pin (pin 1 = Intel, pin 2 = AMD). Both modes share the same physical interface but differ in timing, command set, and telemetry register map-mode selection must be fixed at power-on.
CHL8104-09CRT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Type:
- PWM
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 5
- Output Phases:
- 4
- Voltage - Supply (Vcc/Vdd):
- 3.3V
- Frequency - Switching:
- 200kHz ~ 1.2MHz
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- I2C
- Control Features:
- Enable, Power Good
- Operating Temperature:
- 0°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PG-VQFN-40-903
CHL8104-09CRT FAQ
1.How can I place an order for CHL8104-09CRT through Aetrix?
Please submit a Request for Quotation (RFQ) for CHL8104-09CRT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CHL8104-09CRT reliable?
The price and inventory of CHL8104-09CRT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CHL8104-09CRT is usually 5 days.
3.What payment methods are accepted for CHL8104-09CRT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CHL8104-09CRT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CHL8104-09CRT?
CHL8104-09CRT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CHL8104-09CRT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CHL8104-09CRT?
For technical support, including CHL8104-09CRT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CHL8104-09CRT requirements.
6.How does Aetrix verify that CHL8104-09CRT is sourced from the original manufacturer or authorized distributors?
All CHL8104-09CRT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CHL8104-09CRT meets industry standards.
7.What is the process for return or replacement of CHL8104-09CRT?
All CHL8104-09CRT units undergo pre-shipment inspection (PSI). If there is an issue with CHL8104-09CRT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CHL8104-09CRT part is unused and in its original packaging.
Return procedure for CHL8104-09CRT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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