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Infineon Technologies CHL8112A-08CRT
- Part No.:
- CHL8112A-08CRT
- Manufacturer:
- Infineon Technologies
- Category:
- DC DC Switching Controllers
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
CHL8112A-08CRT.pdf
- Description:
- IC REG BUCK 40VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,975
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Product details
Overview
CHL8112A-08CRT from CHiL Semiconductor is a dual-loop, 5-phase digital multi-phase buck controller supporting AMD® SVI/G34 and Memory MPoL modes, with programmable switching frequency (200 kHz–1.2 MHz), Variable Gate Drive, and CHiL Adaptive Transient Algorithm (ATA); used in high-performance CPU VRMs for AMD-based desktop and server platforms.
For engineers reviewing the CHL8112A-08CRT datasheet, CHL8112A-08CRT pinout, CHL8112A-08CRT application, or CHL8112A-08CRT equivalent, key selection considerations include dual-loop OCP support, SMBus/PMBus telemetry interface, NVM-based configuration storage, coupled-inductor compatibility, and per-loop fault protection (OVP/UVP/OCP/OTP/CFP).
Technical Context
The CHL8112A-08CRT implements two independent digital PWM control loops with real-time adaptive transient response via proprietary non-linear digital PWM algorithms (ATA), enabling bulk capacitor reduction. It supports flexible phase assignment (1–5 phases total) between loops, including 1-phase or 2-phase light-load operation with active diode emulation.
It integrates I²C/SMBus/PMBus v1.2 compliance for full telemetry (voltage, current, temperature, power per loop), non-volatile memory for custom configuration, and dual OCP with I-spike detection optimized for AMD CPU power delivery. The VAR_GATE_PM_ADDR pin enables variable gate drive voltage selection or PMBus address configuration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Dual-loop digital multi-phase synchronous buck controller with up to 5 total phases |
| Switching Frequency | 200 kHz to 1.2 MHz per phase - enables optimization of efficiency vs. size across load range |
| Control Interface | I²C/SMBus/PMBus v1.2 - supports telemetry readback and configuration write to on-chip NVM |
| Phase Assignment | Flexible allocation between Loop 1 and Loop 2 - allows asymmetric output configurations (e.g., 3+2, 4+1) |
| Light-Load Mode | Programmable 1-phase or 2-phase operation with active diode emulation - reduces switching losses at <5% load |
| Fault Protection | Per-loop OVP, UVP, OCP, OTP, CFP - ensures robust system-level VRM safety without external circuitry |
| Package | 6×6 mm, 40-pin QFN - surface-mount footprint compatible with automated PCB assembly |
Pinout & Package
CHL8112A-08CRT is housed in a Pb-free, RoHS-compliant 6×6 mm, 40-pin QFN package with exposed thermal pad. Pin functions are defined for both AMD SVI and MPoL operating modes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PWM1–PWM5 | Phase gate drive outputs | Drive external high-side MOSFETs; support coupled-inductor pairing (e.g., PWM1/PWM2 as pair) |
| ISEN1–ISEN5 | Current sense inputs | Per-phase current monitoring via low-side shunt resistors; enable precise OCP and phase shedding |
| VSEN / VSEN_L2 | Output voltage feedback inputs | High-impedance analog inputs for closed-loop voltage regulation on Loop 1 and Loop 2 |
| SMB_CLK / SMB_DIO / SMB_ALERT# | PMBus interface signals | Enable bidirectional telemetry communication and alert signaling to system management controller |
| VAR_GATE_PM_ADDR | Configuration select pin | Configures pin function as either variable gate drive voltage selector or PMBus address bit (CHL8112A only) |
| VR_READY1 / VR_READY_L21 | Power-good status outputs | Open-drain signals indicating stable regulation on each loop; synchronized to avoid false sequencing faults |
Key Features
| Feature | Design Value |
|---|---|
| CHiL Adaptive Transient Algorithm (ATA) | Reduces required bulk capacitance by >30% vs. fixed-frequency controllers through predictive non-linear PWM response |
| Dynamic Phase Control | Automatically adds/drops phases in real time based on measured load current - maintains peak efficiency across 1–100% load |
| Variable Gate Drive (CHL8112A) | Adjusts high-side gate drive voltage (3.3V/5V/7V) dynamically to minimize MOSFET switching loss and conduction loss trade-off |
| NVM Configuration Storage | Eliminates external EEPROM; stores custom loop parameters, fault thresholds, and startup sequences in on-chip memory |
| Dual OCP with I-spike Detection | Independent overcurrent protection per loop with fast-response current spike detection tailored for AMD CPU transient profiles |
Applications
| AMD CPU Power Delivery | DDR Memory Vtt Tracking |
|---|---|
Use Scenario: Primary CPU core voltage regulator in AMD Socket G34 or AM3+ platforms with multi-core processors requiring dynamic phase scaling. IC Role / Device Role / Timing Role: Dual-loop digital buck controller managing up to 5 phases across VDD and VDDIO rails with SVI protocol handshake. Use Value: Enables precise, telemetry-enabled power delivery with <500 ns transient response and <±0.5% regulation accuracy under load steps. | Use Scenario: DDR3/DDR4 memory termination regulator providing tightly tracked Vtt referenced to VDDQ in high-speed memory subsystems. IC Role / Device Role / Timing Role: Secondary loop configured in MPoL mode to generate Vtt with 0.5×VDDQ tracking ratio and independent OVP/UVP monitoring. Use Value: Eliminates need for discrete tracking circuitry; achieves ±10 mV Vtt tracking accuracy across temperature and load. |
| Gaming Platform Overclocking | Server VR Hot-Spot Monitoring |
Use Scenario: High-current VRM in enthusiast gaming motherboards supporting manual Vmax override and dynamic overclocking profiles. IC Role / Device Role / Timing Role: Configurable controller with Vmax setting register and real-time telemetry for user-adjustable voltage/frequency curves. Use Value: Allows safe, software-controlled overclocking with hardware-enforced voltage limits and per-loop thermal throttling. | Use Scenario: Dual-loop VRM in 1U/2U rack servers where VR_HOT#1 and VRHOT_ICRIT#2 signals feed BMC for thermal event escalation. IC Role / Device Role / Timing Role: Integrated thermistor-based temperature sensing with dual VRHOT assertion logic per loop for independent hot-spot detection. Use Value: Provides early thermal warning before critical shutdown, enabling proactive fan ramp-up and workload migration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-loop digital multi-phase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR3567B | Single-die dual-loop controller with integrated MOSFET drivers; no NVM; uses proprietary GUI (PowIRCenter) | Targeted at Intel VR12.5/VR13 platforms; lacks AMD SVI native support and Vtt tracking mode | Prefer CHL8112A-08CRT for AMD-specific designs requiring SVI compliance and MPoL memory regulation |
| TPS53689 | TI dual-loop controller with PMBus v1.3; supports D-CAP3 modulation; no variable gate drive or ATA algorithm | Optimized for Intel Core i9 and Xeon Scalable; includes auto-compensation but no coupled-inductor phase-pairing mode | Choose CHL8112A-08CRT when coupled-inductor layout, ATA-driven capacitor reduction, or AMD ecosystem integration are required |
Compared with IR3567B and TPS53689, CHL8112A-08CRT uniquely delivers AMD-native SVI/MPoL protocol support, on-chip NVM for field-reprogrammability, and CHiL Efficiency Shaping features-making it the only option qualified for high-density, telemetry-rich AMD server and overclocking VRMs.
Availability
CHL8112A-08CRT is available at Aetrix Electronics and suitable for AMD CPU VRMs, DDR memory Vtt regulators, and overclocking platform power delivery requiring stable component supply, long-lifecycle support, and consistent electrical performance across production batches.
Supply support for CHL8112A-08CRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
CHiL Semiconductor Corp. was a fabless power management IC designer headquartered in Tewksbury, MA, specializing in digitally controlled multi-phase buck controllers for high-performance computing applications before its acquisition by ON Semiconductor in 2013.
The CHL8112A product line was developed specifically for AMD ecosystem power delivery, emphasizing SVI protocol compliance, dual-loop flexibility, and efficiency shaping technologies to reduce system-level cost and board area in CPU and memory VRMs.
FAQ
What is the function of the VAR_GATE_PM_ADDR pin on CHL8112A-08CRT?
This pin selects between two mutually exclusive functions: when pulled high, it configures the device for variable gate drive voltage selection (3.3V/5V/7V); when pulled low, it serves as a PMBus address bit for multi-device bus addressing. Its state is latched at power-on reset and cannot be changed dynamically during operation.
Does CHL8112A-08CRT require external programming before first use?
Yes. Unprogrammed CHL8112A-08CRT devices (including -08CRT configuration) will not initiate power-up sequencing until programmed via PMBus using CHiL Intuitive Power Designer (IPD) GUI. Default NVM contents are invalid; configuration must be loaded to define loop parameters, fault thresholds, and startup timing.
Can CHL8112A-08CRT operate with standard discrete MOSFETs or only with CHiL-specific drivers?
It is fully compatible with industry-standard 3.3V tri-state gate drivers (e.g., CHL8510, ISL6617, HIP6301) and discrete MOSFETs. The controller outputs 3.3V logic-level PWM signals and does not integrate gate drivers; external drivers must be selected based on phase current, switching frequency, and thermal constraints.
How does the CHiL Adaptive Transient Algorithm (ATA) differ from conventional digital PWM?
ATA employs a proprietary non-linear digital PWM algorithm that predicts load transients using real-time current and voltage derivatives, adjusting duty cycle and phase count preemptively. Unlike linear PID-based controllers, ATA reduces output voltage deviation by up to 60% and cuts required bulk capacitance by ≥30% without increasing control loop complexity.
CHL8112A-08CRT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Type:
- PWM
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 5
- Output Phases:
- 5
- Voltage - Supply (Vcc/Vdd):
- 3.3V
- Frequency - Switching:
- 200kHz ~ 1.2MHz
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- I2C, PMBus, SMBus
- Control Features:
- Enable, Power Good
- Operating Temperature:
- 0°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PG-VQFN-40-902
CHL8112A-08CRT FAQ
1.How can I place an order for CHL8112A-08CRT through Aetrix?
Please submit a Request for Quotation (RFQ) for CHL8112A-08CRT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CHL8112A-08CRT reliable?
The price and inventory of CHL8112A-08CRT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CHL8112A-08CRT is usually 5 days.
3.What payment methods are accepted for CHL8112A-08CRT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CHL8112A-08CRT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CHL8112A-08CRT?
CHL8112A-08CRT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CHL8112A-08CRT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CHL8112A-08CRT?
For technical support, including CHL8112A-08CRT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CHL8112A-08CRT requirements.
6.How does Aetrix verify that CHL8112A-08CRT is sourced from the original manufacturer or authorized distributors?
All CHL8112A-08CRT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CHL8112A-08CRT meets industry standards.
7.What is the process for return or replacement of CHL8112A-08CRT?
All CHL8112A-08CRT units undergo pre-shipment inspection (PSI). If there is an issue with CHL8112A-08CRT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CHL8112A-08CRT part is unused and in its original packaging.
Return procedure for CHL8112A-08CRT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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