Infineon Technologies CHL8225-03CRT

Overview

CHL8225-03CRT from CHiL Semiconductor is a dual-loop, 5-phase digital multi-phase buck controller for GPU and high-performance CPU voltage regulation. It supports up to 3 input voltages, operates from 200kHz to 1.2MHz switching frequency, delivers dynamic voltage control via 2-bit parallel interface with Gamer Mode override, and integrates I²C/SMBus/PMBus telemetry for voltage, current, temperature, and power on both loops.

For engineers reviewing the CHL8225-03CRT datasheet, CHL8225-03CRT pinout, CHL8225-03CRT application, or CHL8225-03CRT equivalent, key selection criteria include per-loop OVP/UVP/OCP/OTP protection, CHiL Adaptive Transient Algorithm (ATA) for bulk capacitor reduction, NVM-based custom configuration, coupled inductor support, and compatibility with CHiL ATL and 3.3V tri-state drivers.

Technical Context

The CHL8225-03CRT implements a dual-loop architecture with independent phase assignment: Loop 1 supports up to 5 phases, Loop 2 is disabled or configured as secondary output. It uses proprietary non-linear digital PWM for ATA transient response optimization and supports active diode emulation and 1-/2-phase light-load operation.

Input Voltage Management monitors up to three VIN sources (VINSEN, VINSEN_AUX1, VINSEN_AUX2), while ICRITICAL monitoring and Phase Current Capture Mode enable real-time current profiling. The controller requires +3.3V supply and operates from 0°C to +85°C ambient.

Key Specifications

Pinout & Package

CHL8225-03CRT is housed in a 6×6 mm, 40-pin QFN package with exposed thermal pad (RoHS-compliant, Pb-free). Pin functions are validated per CHiL Semiconductor PB0008 Rev 1.0.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-loop digital multi-phase buck controller applications.

Compared with ISL6376IRZ-T and TPS53689RTAT, the CHL8225-03CRT uniquely combines dual-loop autonomy, ATA-driven transient response, and Input Voltage Management-enabling fewer bulk caps, tighter thermal margins, and simplified multi-rail sequencing in GPU and AI accelerator designs.

Availability

CHL8225-03CRT is available at Aetrix Electronics and suitable for GPU voltage regulation, AI accelerator boards, high-performance CPU VRMs, and workstation graphics modules requiring stable component supply and long-term design-in support.

Supply support for CHL8225-03CRT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

CHiL Semiconductor Corp., headquartered in Tewksbury, MA, specialized in digitally controlled power management ICs before its acquisition by ON Semiconductor in 2013.

The CHL8225 product line was engineered specifically for high-transient, multi-rail GPU and AI processor power delivery-emphasizing adaptive algorithms, telemetry-rich interfaces, and compact integration for space-constrained VRMs.

FAQ

What is the function of the VRHOT_ICRIT# pin?

VRHOT_ICRIT# is an open-drain fault output that asserts low when either the ICRITICAL current threshold is exceeded or the die temperature exceeds the programmed VRHOT limit. It serves as a system-level interrupt signal for immediate power-down or throttling, with independent thresholds configurable via PMBus registers.

Does CHL8225-03CRT require external programming before first power-up?

Yes. As stated in the ordering information, unprogrammed CHL8225-03CRT parts (including -00CRT default variants) will not initialize until configured via I²C/PMBus using CHiL Intuitive Power Designer (IPD) GUI. This prevents unsafe power-up conditions by enforcing valid VOUT, phase count, and protection settings prior to operation.

Can CHL8225-03CRT support coupled inductors in both loops?

No. Coupled inductor mode is supported only in Loop 1 (primary output) and requires phase pairing (e.g., PWM1+PWM2, PWM3+PWM4). Loop 2 in the CHL8225 is either disabled or used as a simple secondary output without coupled inductor or phase-pairing capability-unlike the CHL8228 which extends this feature to both loops.

What is the role of VAR_GATE in system design?

VAR_GATE provides a programmable analog output (0.5–2.5V) that controls external variable gate-drive circuits (e.g., CHL8510). It dynamically scales high-side MOSFET gate voltage based on real-time load current-reducing switching losses at light loads and conduction losses at heavy loads-thereby extending the high-efficiency operating range across the full 1–100% load spectrum.