Texas Instruments CLVC125AQPWRG4Q1
- Part No.:
- CLVC125AQPWRG4Q1
- Manufacturer:
- Texas Instruments
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
CLVC125AQPWRG4Q1.pdf
- Description:
- IC BUF NON-INVERT 3.6V 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,495
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CLVC125AQPWRG4Q1 from Texas Instruments is an automotive-qualified quadruple bus buffer gate with 3-state outputs, operating from 1.65V to 3.6V supply voltage, supporting –40°C to 125°C ambient temperature, featuring 4.8ns max propagation delay at 3.3V, and accepting 5.5V-tolerant inputs for mixed-voltage system interfacing in vehicle body control modules.
For engineers reviewing the CLVC125AQPWRG4Q1 datasheet, CLVC125AQPWRG4Q1 pinout, CLVC125AQPWRG4Q1 application, or CLVC125AQPWRG4Q1 equivalent, this page delivers verified functional identity, validated TSSOP-14 pin mapping, confirmed AEC-Q100 qualification, and real-world automotive interface use cases - all grounded in TI's official SCAS762E production data sheet.
Technical Context
This device implements four independent noninverting buffers, each with dedicated active-low output-enable (OE) control enabling precise bus isolation. Each channel operates as a level translator: inputs tolerate up to 5.5V while outputs swing rail-to-rail between VCC and GND, allowing seamless interfacing between 3.3V logic and legacy 5V subsystems.
Its 3-state architecture supports bidirectional bus sharing without contention; output disable timing is characterized with tdis ≤ 4.4ns and ten ≤ 5.2ns at 3.3V, and ground bounce (VOLP) and undershoot (VOHV) are specified at <0.8V and >2V respectively - critical for noise-sensitive automotive CAN/LIN domain controllers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.65V–3.6V - enables direct integration into modern low-voltage automotive domains (e.g., ADAS power rails) without level-shifting circuitry |
| Operating Temperature | –40°C to +125°C - qualified per AEC-Q100 Grade 1 for under-hood and cabin ECUs |
| Propagation Delay | Max 4.8ns at 3.3V - ensures sub-5ns timing margin for high-speed serial bus enable/disable sequencing |
| Input Voltage Tolerance | Up to 5.5V - allows direct connection to 5V microcontrollers or sensors without external clamping |
| Output Drive Strength | ±24mA at 3.0V - sufficient to drive 50Ω transmission lines or fan-out to ≥10 LVC loads |
| ESD Rating | ±2000V HBM - meets automotive board-level ESD robustness requirements per ISO 10605 |
Pinout & Package
TSSOP-14 (PW) package: 5.00mm × 6.4mm body, 1.2mm max height, exposed thermal pad not present - standard surface-mount footprint compatible with IPC-7351 SOIC-14 land pattern.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1OE, 4OE, 3OE, 2OE | Active-low output enable input | Individually disables corresponding Y output to high-impedance state; tied to VCC via pull-up for power-up safety |
| 1A, 2A, 3A, 4A | Buffer input | Noninverting data input per channel; accepts 0–5.5V regardless of VCC |
| 1Y, 2Y, 3Y, 4Y | Buffer output | 3-state CMOS output; drives VCC/GND when enabled, high-Z when OE = HIGH |
| VCC (Pin 14) | Positive supply | Single 1.65–3.6V rail powers all four channels; bypass capacitor required adjacent to pin |
| GND (Pin 7) | Ground reference | Common return for all I/O and internal logic; must be low-inductance connection to PCB ground plane |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use across –40°C to +125°C, including HTOL, TC, and ESD stress testing per JESD47 |
| 5.5V-tolerant inputs | Enables direct interface with 5V microcontrollers or sensors without external resistors or translators |
| Low ground bounce (VOLP < 0.8V) | Minimizes switching noise coupling into shared ground paths - critical for mixed-signal automotive clusters |
| Fast enable/disable timing | tdis ≤ 4.4ns and ten ≤ 5.2ns at 3.3V ensures clean bus arbitration in time-critical LIN/CAN gateway applications |
| Latch-up immunity > 250mA | Exceeds JEDEC JESD17 requirement - prevents destructive latch-up during transient overvoltage events in vehicle power systems |
Applications
| Body Control Module (BCM) | Instrument Cluster Interface |
|---|---|
Use Scenario: Isolating microcontroller GPIOs from 5V display backlight drivers and door lock actuators. IC Role / Device Role / Timing Role: Bidirectional bus buffer with per-channel OE control enabling selective peripheral activation. Use Value: Eliminates need for discrete MOSFET switches or level shifters while maintaining AEC-Q100 compliance. |
Use Scenario: Level-translating SPI signals between a 3.3V MCU and 5V TFT LCD controller in digital dashboards. IC Role / Device Role / Timing Role: Noninverting buffer with 5.5V-tolerant inputs preserving signal integrity across voltage domains. Use Value: Achieves <5ns propagation delay and rail-to-rail output swing without timing skew or added BOM cost. |
| Powertrain Sensor Hub | ADAS Camera Interface |
Use Scenario: Enabling/disabling analog sensor multiplexer select lines in engine control units under fault conditions. IC Role / Device Role / Timing Role: Fault-isolation gate with fast disable (tdis ≤ 4.4ns) to cut off erroneous sensor commands. Use Value: Meets ASIL-B timing constraints for safe shutdown of actuator control paths during diagnostics. |
Use Scenario: Buffering MIPI CSI-2 clock enable and reset signals between 3.3V SoC and 5V image sensor modules. IC Role / Device Role / Timing Role: Low-noise, high-speed enable gate ensuring clean edge transitions on critical timing lines. Use Value: VOLP < 0.8V prevents ground bounce from corrupting adjacent high-speed video data lanes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC125AQPWRQ1 | No G4 suffix; identical electrical specs and packaging, but shipped in standard tape-and-reel (no green marking) | Same automotive qualification and performance - suitable where RoHS-compliant marking is not required | Select when full TI green-label traceability is unnecessary and cost optimization is prioritized |
| SN74LVC125AQDRQ1 | SOIC-14 (D package) instead of TSSOP-14; larger 8.65mm × 6mm footprint and higher RθJA (127.8°C/W) | Better suited for manual assembly or legacy PCBs with SOIC footprints; lower thermal efficiency limits high-density layouts | Choose only when TSSOP reflow capability is unavailable or board space permits larger package |
Compared with SN74LVC125AQPWRQ1 and SN74LVC125AQDRQ1, CLVC125AQPWRG4Q1 provides identical core functionality with enhanced traceability via G4 green marking and optimized thermal performance in the compact TSSOP-14 package - making it the preferred choice for new automotive designs requiring high-density layout and full supply-chain visibility.
Availability
CLVC125AQPWRG4Q1 is available at Aetrix Electronics and suitable for automotive body control modules, instrument cluster interfaces, powertrain sensor hubs, and ADAS camera interfaces requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for CLVC125AQPWRG4Q1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of automotive-grade IC development and AEC-Q100 validation expertise.
The SN74LVC125A-Q1 product line delivers robust, low-voltage bus interface solutions designed specifically for automotive electronic control units requiring mixed-voltage interoperability, high noise immunity, and extended temperature operation.
FAQ
What is the exact package type and footprint for CLVC125AQPWRG4Q1?
CLVC125AQPWRG4Q1 uses the TSSOP-14 (PW) package: 5.00mm × 6.4mm body size, 0.65mm lead pitch, and 1.2mm maximum height. Its land pattern follows IPC-7351 SOIC-14 standards, with recommended solder paste stencil aperture of 0.6mm × 1.55mm per lead and 0.125mm thickness - fully documented in TI's PW0014A mechanical drawing.
Does CLVC125AQPWRG4Q1 support true 5V logic interfacing?
Yes - CLVC125AQPWRG4Q1 features 5.5V-tolerant inputs, meaning its A-inputs accept 0–5.5V signals regardless of VCC (1.65–3.6V). This enables direct connection to 5V microcontrollers or sensors without external level-shifting components, while outputs remain strictly VCC-referenced.
How does CLVC125AQPWRG4Q1 ensure safe operation during power-up?
CLVC125AQPWRG4Q1 requires OE pins to be pulled high (to VCC) via external resistors during power-up to guarantee outputs remain in high-impedance state until firmware initializes. TI specifies minimum pull-up resistance based on driver sink capability - typically 10kΩ suffices for most automotive MCU GPIOs.
What is the maximum output current drive capability of CLVC125AQPWRG4Q1?
CLVC125AQPWRG4Q1 delivers ±24mA output current per channel at VCC = 3.0V (IOL/IOH), meeting the drive strength needed for fan-out to ≥10 LVC loads or termination of 50Ω transmission lines. At 1.65V, it sustains ±4mA - sufficient for low-power inter-chip signaling.
Is CLVC125AQPWRG4Q1 pin-compatible with non-automotive versions like SN74LVC125A?
Yes - CLVC125AQPWRG4Q1 shares identical pinout, electrical behavior, and functional truth table with SN74LVC125A. However, it adds AEC-Q100 qualification, extended temperature range (–40°C to +125°C), and automotive-specific reliability testing - making it a drop-in replacement where automotive compliance is mandatory.
CLVC125AQPWRG4Q1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
CLVC125AQPWRG4Q1 FAQ
1.How can I place an order for CLVC125AQPWRG4Q1 through Aetrix?
Please submit a Request for Quotation (RFQ) for CLVC125AQPWRG4Q1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CLVC125AQPWRG4Q1 reliable?
The price and inventory of CLVC125AQPWRG4Q1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CLVC125AQPWRG4Q1 is usually 5 days.
3.What payment methods are accepted for CLVC125AQPWRG4Q1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CLVC125AQPWRG4Q1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CLVC125AQPWRG4Q1?
CLVC125AQPWRG4Q1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CLVC125AQPWRG4Q1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CLVC125AQPWRG4Q1?
For technical support, including CLVC125AQPWRG4Q1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CLVC125AQPWRG4Q1 requirements.
6.How does Aetrix verify that CLVC125AQPWRG4Q1 is sourced from the original manufacturer or authorized distributors?
All CLVC125AQPWRG4Q1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CLVC125AQPWRG4Q1 meets industry standards.
7.What is the process for return or replacement of CLVC125AQPWRG4Q1?
All CLVC125AQPWRG4Q1 units undergo pre-shipment inspection (PSI). If there is an issue with CLVC125AQPWRG4Q1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CLVC125AQPWRG4Q1 part is unused and in its original packaging.
Return procedure for CLVC125AQPWRG4Q1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CLVC125AQPWRG4Q1 Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

