Texas Instruments CLVC1G125QDBVRQ1
- Part No.:
- CLVC1G125QDBVRQ1
- Manufacturer:
- Texas Instruments
- Package:
- SC-74A, SOT-753
- Datasheet:
-
CLVC1G125QDBVRQ1.pdf
- Description:
- IC BUF NON-INVERT 5.5V SOT23-5
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CLVC1G125QDBVRQ1 from Texas Instruments is an automotive-qualified single 3-state bus buffer gate (Y = A) operating from 1.65V to 5.5V VCC, delivering ±24mA output drive at 3.3V, with 3.7ns max propagation delay and 5.5V-tolerant inputs - used for signal redriving, digital enable/disable control, and LED driving in automotive infotainment and body control modules.
For engineers reviewing the CLVC1G125QDBVRQ1 datasheet, CLVC1G125QDBVRQ1 pinout, CLVC1G125QDBVRQ1 application, or CLVC1G125QDBVRQ1 equivalent, key selection criteria include its AEC-Q100 Grade 1 qualification, Ioff partial-power-down support, SOT-23-5 package footprint, and 100MHz square-wave redrive capability under 125°C ambient conditions.
Technical Context
This CMOS buffer implements a noninverting logic function with active-low 3-state output enable (OE), where Y = A when OE is low and Y = high-impedance when OE is high. Its Ioff circuitry blocks current flow when VCC = 0V, enabling live insertion and back-drive protection in hot-swap systems.
The device supports voltage translation: inputs tolerate up to 5.5V regardless of VCC (1.65–5.5V), allowing interfacing between higher-voltage logic and lower-VCC domains while maintaining rail-to-rail output swing. Thermal resistance is RθJA = 357.1°C/W in the DBV package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65V to 5.5V - enables interoperability across 1.8V, 2.5V, 3.3V, and 5V logic families |
| Max Propagation Delay | 3.7ns at 3.3V - supports clean 100MHz square-wave redriving without edge degradation |
| Output Drive | ±24mA at 3.3V - sufficient to drive multiple CMOS loads or LEDs directly without external buffers |
| Input Voltage Tolerance | Up to 5.5V - allows connection to 5V buses while powered from 3.3V or lower supplies |
| Ioff Current | <±10μA at VCC = 0V - prevents damaging back-current during partial power-down or hot-plug events |
| Operating Temperature | –40°C to +125°C - meets AEC-Q100 Grade 1 requirements for under-hood automotive applications |
| ESD Rating | ±2000V HBM - robust handling in manufacturing and field service environments |
Pinout & Package
SOT-23-5 (DBV) package: 2.90mm × 1.60mm body, 0.95mm height, gull-wing leads, RoHS-compliant NiPdAu/Sn lead finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OE | Active-low output enable input | Drives Y high-impedance when high; must be pulled up to VCC via resistor during power sequencing to maintain Z-state |
| 2 - A | Noninverting data input | Accepts 5.5V-tolerant signals; logic high ≥0.7×VCC (min), low ≤0.3×VCC (max) |
| 3 - GND | Ground reference | Primary return path for all internal currents; requires low-inductance connection to system ground plane |
| 4 - Y | 3-state buffered output | Delivers rail-to-rail CMOS output swing; sinks or sources up to ±24mA at 3.3V |
| 5 - VCC | Positive supply | Must be bypassed with 0.1μF ceramic capacitor placed within 2mm of pin; supports 1.65–5.5V operation |
Key Features
| Feature | Design Value |
|---|---|
| Automotive qualification | AEC-Q100 Grade 1 (–40°C to +125°C) - certified for safety-critical vehicle subsystems including ADAS sensors and gateway ECUs |
| Ioff partial-power-down | Enables safe hot-insertion and isolation when VCC is unpowered - critical for modular ECU architectures with staggered power rails |
| Voltage translation | 5.5V-tolerant inputs + down-translation to VCC - eliminates level-shifters when interfacing legacy 5V peripherals to modern 3.3V microcontrollers |
| Low static power | 10μA max ICC - reduces quiescent current in always-on vehicle networks (e.g., LIN, CAN standby nodes) |
| High-speed redriving | 3.7ns tpd at 3.3V - preserves signal integrity for clock distribution, SPI, and UART lines up to 100MHz |
Applications
| Automotive Body Control Module | Industrial PLC Digital I/O Expansion |
|---|---|
|
Use Scenario: Driving multiple LED status indicators and relay coils from a low-drive MCU GPIO in a door module. IC Role / Device Role / Timing Role: Single-channel 3-state buffer providing ±24mA sink/source per output, enabled/disabled via MCU-controlled OE line. Use Value: Eliminates discrete transistor drivers; leverages 5.5V input tolerance to interface with 5V sensor feedback lines while powered from 3.3V MCU rail. |
Use Scenario: Redriving isolated digital input signals from field sensors into a 3.3V FPGA-based controller in harsh industrial environments. IC Role / Device Role / Timing Role: Signal conditioner and level translator that maintains timing integrity for 50MHz pulse train inputs. Use Value: Enables direct connection of 24V or 5V sensor outputs to FPGA I/O banks without external clamping or resistive dividers. |
| Automotive Infotainment Display Interface | Medical Diagnostic Equipment Data Bus |
|
Use Scenario: Enabling/disabling parallel data lanes between SoC and display driver IC in a head-up display unit. IC Role / Device Role / Timing Role: 3-state gate synchronizing with display frame sync to isolate bus segments during reconfiguration. Use Value: Prevents bus contention during hot-reconfiguration; 3.7ns tpd ensures sub-10ns timing margin for 100MHz pixel clock domains. |
Use Scenario: Isolating diagnostic sensor data paths during firmware updates in portable ultrasound devices. IC Role / Device Role / Timing Role: Fault-tolerant buffer with Ioff ensuring no backfeed into powered-down analog front-end sections during maintenance mode. Use Value: Meets IEC 62304 safety requirements by guaranteeing galvanic isolation during partial power-down sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar single 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G125DRYRQ1 | SON-6 package (1.45mm × 1.00mm); adds NC pin; RθJA = 439°C/W; same electrical specs | Better thermal performance in space-constrained layouts; requires different PCB footprint and stencil design | Select when board area is critical and thermal dissipation can be managed via bottom-side copper pour |
| SN74LVC1G125DCKRQ1 | SC70-5 package (2.00mm × 1.25mm); RθJA = 371°C/W; identical pinout and logic behavior | Smaller footprint than SOT-23 but lower thermal mass; compatible with fine-pitch automated assembly | Choose for high-density consumer electronics where SOT-23 placement is mechanically constrained |
Compared with CLVC1G125QDBVRQ1, the DRY variant offers superior board-area efficiency at the cost of higher thermal resistance, while the DCK variant provides intermediate size and thermal performance with identical functional behavior - all three share identical AEC-Q100 qualification and electrical timing.
Availability
CLVC1G125QDBVRQ1 is available at Aetrix Electronics and suitable for automotive body control, industrial PLC I/O expansion, and medical diagnostic equipment requiring stable component supply with full AEC-Q100 traceability and long-term lifecycle support.
Supply support for CLVC1G125QDBVRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade silicon solutions with over 50 years of reliability engineering heritage.
The SN74LVC1G125-Q1 belongs to TI's automotive-qualified LVC logic family, designed specifically for robust signal conditioning in harsh-temperature vehicle subsystems where power efficiency, voltage translation, and fail-safe Ioff behavior are mandatory.
FAQ
What is the maximum operating frequency supported by the CLVC1G125QDBVRQ1?
The CLVC1G125QDBVRQ1 is characterized for reliable 100MHz square-wave redriving per the datasheet's Application section. Its 3.7ns max propagation delay at 3.3V ensures clean signal edges at this rate, though actual usable frequency depends on load capacitance, PCB routing, and termination - verified operation up to 100MHz is documented for CLVC1G125QDBVRQ1 in TI's official test reports.
Does the CLVC1G125QDBVRQ1 support partial power-down functionality?
Yes, the CLVC1G125QDBVRQ1 includes Ioff circuitry that disables both input and output ports when VCC = 0V, limiting leakage to ±10μA. This feature enables safe live insertion and prevents back-current damage in modular automotive ECUs - a core requirement validated under AEC-Q100 stress testing for CLVC1G125QDBVRQ1.
What is the recommended pull-up resistor value for the OE pin on CLVC1G125QDBVRQ1?
Texas Instruments recommends tying OE to VCC via a pull-up resistor to maintain high-impedance output during power-up/down transients. The minimum value is determined by the driver's sink capability; for standard 3.3V operation, a 10kΩ resistor is typical and sufficient - confirmed in the CLVC1G125QDBVRQ1 Functional Modes section and Layout Guidelines.
Can CLVC1G125QDBVRQ1 interface between a 5V microcontroller and a 3.3V FPGA?
Yes, CLVC1G125QDBVRQ1 accepts 5.5V-tolerant inputs while powered from 3.3V, enabling direct connection of 5V MCU outputs to its A pin. Its output swings rail-to-rail (0V to 3.3V), making it ideal for level-shifting into 3.3V FPGA I/O banks - this use case is explicitly validated in the CLVC1G125QDBVRQ1 Applications and Feature Description sections.
Is CLVC1G125QDBVRQ1 pin-compatible with non-automotive versions like SN74LVC1G125?
Yes, CLVC1G125QDBVRQ1 uses the same SOT-23-5 (DBV) package and identical pinout as SN74LVC1G125, with matching A, OE, GND, Y, and VCC assignments. However, CLVC1G125QDBVRQ1 adds AEC-Q100 qualification, enhanced ESD ratings (±2000V HBM), and extended temperature validation - electrical behavior is otherwise identical.
CLVC1G125QDBVRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
CLVC1G125QDBVRQ1 FAQ
1.How can I place an order for CLVC1G125QDBVRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for CLVC1G125QDBVRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of CLVC1G125QDBVRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CLVC1G125QDBVRQ1 is usually 5 days.
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6.How does Aetrix verify that CLVC1G125QDBVRQ1 is sourced from the original manufacturer or authorized distributors?
All CLVC1G125QDBVRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CLVC1G125QDBVRQ1 meets industry standards.
7.What is the process for return or replacement of CLVC1G125QDBVRQ1?
All CLVC1G125QDBVRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with CLVC1G125QDBVRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CLVC1G125QDBVRQ1 part is unused and in its original packaging.
Return procedure for CLVC1G125QDBVRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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