My Inquiry
My Account
onsemi CS5112YDWF24
- Part No.:
- CS5112YDWF24
- Manufacturer:
- onsemi
- Package:
- -
- Datasheet:
-
CS5112YDWF24.pdf
- Description:
- IC REG LINEAR SWITCHING REG
- Quantity:
- Payment:
- Shipping:
Inventory:1,110
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CS5112YDWF24 from ON Semiconductor is a dual-output power management IC integrating a 5.0 V ±2% linear regulator (100 mA), a 1.4 A current-mode PWM switching regulator, and supervisory functions including watchdog timer, active-low RESET with programmable delay, and ENABLE control. It operates from 5.0 V to 26 V input, supports boost topology, and delivers stable power for automotive and industrial microcontroller systems requiring coordinated reset and voltage monitoring.
For engineers reviewing the CS5112YDWF24 datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-regulator architecture, externally programmable watchdog/RESET timing via CDelay/RBIAS, selectable feedback inputs (VFB1/VFB2), thermal protection, and SOIC-24 package with fused leads.
Technical Context
The CS5112YDWF24 implements a current-mode PWM controller with adjustable oscillator (80–120 kHz), internal 1.4 A NPN switch, and antisaturation control. Its linear regulator uses a composite pass transistor (Q1–Q3) with bandgap reference and error amplifier, delivering 5.0 V ±2% at up to 100 mA with 1.2 V typical dropout.
Supervisory logic includes a falling-edge-triggered watchdog (tWDI = 1.353 × CDelay × RBIAS), POR and undervoltage reset (VRTL = 4.05–4.45 V, VRTH = 4.2–4.7 V), and ENABLE-driven shutdown of the switching section only - the linear regulator remains active when ENABLE is high.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Linear Output | 5.0 V ±2% @ 100 mA; maintains regulation down to 1.0 V VLIN for RESET assertion. |
| Switching Output | 1.4 A peak internal NPN switch; supports boost topologies with external inductor/diode/capacitor. |
| Operating Input Range | 5.0 V to 26 V VIN; load-dump tolerant up to 40 V transient on VIN. |
| Switching Frequency | 80–110 kHz typical (set by COSC capacitor); max 120 kHz under light load. |
| RESET Thresholds | Low threshold VRTL = 4.05–4.45 V; hysteresis = 140–240 mV; ensures noise-immune brownout detection. |
| Watchdog Timeout | 6.25–11 ms (programmable via CDelay and RBIAS); requires falling edge on WDI within window. |
| Thermal Protection | Overtemperature limiter activates at 160–210°C die temperature; reduces VLIN to throttle switcher supply. |
Pinout & Package
CS5112YDWF24 is housed in a Pb-free SOIC-24 package (Case 751E), with internally fused leads and thermal pads connected to eight GND pins (pins 5,6,7,8,17,18,19,20) for enhanced heat dissipation. RJA = 55°C/W, RJC = 9°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (1) | Switching regulator input supply | Provides base drive to internal NPN switch; must be ≥5.0 V for switcher operation. |
| VSW (4) | Switch collector output | Drives external boost inductor; rated for 54 V peak transient; connects to cathode of flyback diode. |
| VLIN (22) | 5.0 V linear regulator output | Stable 5.0 V supply for MCU core/logic; powers internal switcher control circuitry. |
| VREG (23) | Linear regulator input | Accepts 6.6–26 V unregulated input; powers linear section and internal bias networks. |
| ENABLE (24) | Switcher enable/disable control | Logic-high disables switching regulator only; linear regulator remains active. |
| RESET (16) | Active-low reset output | Asserts low during POR, undervoltage, or watchdog timeout; sinks 5 mA; open-drain compatible. |
| WDI (14) | Watchdog input | Falling-edge triggered; internal 20–100 kΩ pullup; requires pulse every 6.25–11 ms. |
| SELECT (11) | Feedback source selector | Open = VFB2 active; grounded = VFB1 active; enables dynamic output voltage selection in boost mode. |
Key Features
| Feature | Design Value |
|---|---|
| Dual regulated outputs | Independent 5.0 V linear (100 mA) and programmable boost switching (1.4 A) coexist on single die with shared thermal management. |
| Programmable supervision | Single RC network (CDelay + RBIAS) sets both Power-On Reset delay and watchdog timeout - simplifies BOM and layout. |
| Topology flexibility | Selectable VFB1/VFB2 inputs allow two distinct boost output voltages (e.g., 16 V / 18 V) without hardware change - ideal for multi-rail systems. |
| Robust protection suite | Integrated current limiting on both linear and switcher outputs, plus overtemperature foldback - eliminates need for external fault-handling circuitry. |
| Automotive-ready packaging | SOIC-24 with fused leads and Pb-free finish meets AEC-Q100 stress requirements for under-hood applications. |
Applications
| Engine Control Unit (ECU) | Body Control Module (BCM) |
|---|---|
Use Scenario: Powers 16-bit MCU, CAN transceiver, and sensor interface in gasoline/diesel engine management system. IC Role / Device Role / Timing Role: Provides primary 5.0 V rail for MCU core and generates boosted 12–18 V for fuel injector drivers and solenoid control. Use Value: Integrated watchdog and RESET ensure deterministic MCU recovery after voltage sag or software lockup; load-dump tolerance protects against alternator transients. | Use Scenario: Supplies power and reset coordination for door module MCU controlling windows, locks, mirrors, and lighting. IC Role / Device Role / Timing Role: Delivers regulated 5.0 V for logic and programmable boost output for motor drivers; monitors MCU health via WDI. Use Value: Single-chip solution reduces board space vs. discrete LDO + DC-DC + supervisor; SELECT pin enables firmware-selectable output voltage for different actuator types. |
| Industrial PLC I/O Module | Telematics Control Unit (TCU) |
Use Scenario: Powers ARM-based controller and isolated RS-485/RS-232 interfaces in DIN-rail mounted automation hardware. IC Role / Device Role / Timing Role: Generates clean 5.0 V for processor and FPGA; provides boosted rail for level-shifting and isolation bias supplies. Use Value: Wide 5–26 V input range accommodates 12/24 V industrial buses; thermal foldback prevents latch-up during sustained overload conditions. | Use Scenario: Manages power sequencing and fault response for LTE/GNSS modules, eSIM, and vehicle-to-cloud communication subsystems. IC Role / Device Role / Timing Role: Supplies 5.0 V to application processor and generates 15 V for RF front-end PA bias; asserts RESET on brownout or watchdog failure. Use Value: Coordinated POR and watchdog ensure reliable boot and runtime integrity; CDelay-programmed delays match cellular modem initialization timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSLR | Triple-output PMIC (2x DC-DC + 1x LDO); no integrated watchdog or programmable RESET delay; 3 MHz switching frequency. | Targets portable/handheld devices; lacks automotive-grade transient tolerance and load-dump capability. | Choose when higher switching frequency and lower quiescent current are critical, and supervision is handled externally. |
| MAX16922ATP+ | Automotive-qualified dual-output (1x buck + 1x LDO); includes watchdog and RESET but no selectable feedback; fixed 5.0 V switcher output. | Designed for infotainment head units; lacks boost topology support and VFB1/VFB2 selection flexibility. | Prefer when fixed 5.0 V switching output suffices and AEC-Q100 Grade-2 temp range (−40°C to +105°C) is sufficient. |
Compared with TPS65023RSLR and MAX16922ATP+, the CS5112YDWF24 uniquely combines boost-capable switching regulation, dual feedback selection, and automotive-grade transient robustness in a single SOIC-24 package - making it optimal for cost-sensitive, space-constrained ECU and BCM designs requiring programmable supervision.
Availability
CS5112YDWF24 is available at Aetrix Electronics and suitable for automotive engine control units, body electronics modules, industrial PLC I/O systems, and telematics gateways requiring stable component supply across extended temperature and voltage ranges.
Supply support for CS5112YDWF24 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
ON Semiconductor (now onsemi) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, and cloud infrastructure markets.
The CS5112YDWF24 belongs to onsemi's automotive power management IC portfolio, designed specifically for engine and body control applications demanding integrated voltage regulation, supervision, and transient-hardened operation in harsh environments.
FAQ
What is the maximum input voltage rating for CS5112YDWF24?
The CS5112YDWF24 supports a DC input voltage range of 5.0 V to 26 V on VIN and VREG. Its peak transient rating is 40 V on VIN (load dump at 14 V nominal), and 54 V on VSW - enabling robust operation in 12 V and 24 V automotive electrical systems where battery transients occur.
Can CS5112YDWF24 operate in buck topology?
No, the CS5112YDWF24 is designed exclusively for boost topology operation. Its internal NPN switch connects to VSW as a low-side driver, and the block diagram, application circuits, and design notes in the datasheet all specify boost configuration with external inductor, diode, and output capacitor - buck or buck-boost topologies are not supported.
How is the watchdog timeout period set for CS5112YDWF24?
The watchdog timeout for CS5112YDWF24 is set by the external RC network on CDelay (pin 15) and IBIAS (pin 21). Using the formula tWDI = 1.353 × CDelay × RBIAS, a 0.1 μF capacitor and 64.9 kΩ resistor yields 6.25–11 ms typical timeout - confirmed in Electrical Characteristics Table and Figure 7 timing diagrams.
Does CS5112YDWF24 provide separate enable control for the linear regulator?
No, the CS5112YDWF24 does not offer independent enable for the 5.0 V linear regulator. The ENABLE pin (pin 24) controls only the switching regulator section. The linear regulator remains active whenever VREG is within its operating range (6.6–26 V), regardless of ENABLE state - ensuring continuous supervision and MCU bias even during switcher shutdown.
What is the purpose of the SELECT pin on CS5112YDWF24?
On the CS5112YDWF24, the SELECT pin (pin 11) chooses between two internal feedback references: open-circuit selects VFB2 (1.25 V), while grounding selects VFB1 (also 1.25 V). Though both references are identical, this allows two independent external resistor dividers to be connected - enabling dynamic selection of two different boost output voltages (e.g., 16 V or 18 V) via MCU GPIO control.
CS5112YDWF24 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
CS5112YDWF24 FAQ
1.How can I place an order for CS5112YDWF24 through Aetrix?
Please submit a Request for Quotation (RFQ) for CS5112YDWF24 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CS5112YDWF24 reliable?
The price and inventory of CS5112YDWF24 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CS5112YDWF24 is usually 5 days.
3.What payment methods are accepted for CS5112YDWF24?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CS5112YDWF24 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CS5112YDWF24?
CS5112YDWF24 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CS5112YDWF24 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CS5112YDWF24?
For technical support, including CS5112YDWF24 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CS5112YDWF24 requirements.
6.How does Aetrix verify that CS5112YDWF24 is sourced from the original manufacturer or authorized distributors?
All CS5112YDWF24 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CS5112YDWF24 meets industry standards.
7.What is the process for return or replacement of CS5112YDWF24?
All CS5112YDWF24 units undergo pre-shipment inspection (PSI). If there is an issue with CS5112YDWF24, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CS5112YDWF24 part is unused and in its original packaging.
Return procedure for CS5112YDWF24:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CS5112YDWF24 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
