My Inquiry
My Account
onsemi CS5253-1GDP5
- Part No.:
- CS5253-1GDP5
- Manufacturer:
- onsemi
- Package:
- TO-263-6, D2PAK (5 Leads + Tab), TO-263BA
- Datasheet:
-
CS5253-1GDP5.pdf
- Description:
- IC REG LINEAR POS ADJ 3A D2PAK-5
- Quantity:
- Payment:
- Shipping:
Inventory:2,246
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CS5253-1GDP5 from onsemi is a 3.0 A adjustable low-dropout linear regulator in D2PAK-5 package, featuring dual-supply architecture (VPOWER and VCONTROL), remote voltage sensing via dedicated VSENSE pin, and 1.25 V to 5.0 V output range. It delivers stable 2.5 V @ 3.0 A for graphics controller power on VGA cards with <1.0 mV load regulation at the sense point.
For engineers reviewing the CS5253-1GDP5 datasheet, pinout, applications, or equivalent options, key selection criteria include VPOWER dropout < 0.40 V @ 3.0 A, VCONTROL dropout < 1.05 V @ 3.0 A, 1.0% trimmed reference, remote-sense capability, and thermal shutdown with 25°C hysteresis.
Technical Context
The CS5253-1GDP5 employs a PNP–NPN pass transistor pair with physically separated VPOWER (collector) and VCONTROL (base drive) supplies to minimize dropout and power dissipation. Its error amplifier uses Kelvin-connected VSENSE to maintain regulation directly at the load.
Control loop stability relies on external capacitor from Adjust pin to ground (typ. 0.1 µF) and output capacitance ≥33 µF tantalum (ESR < 1.0 Ω). Transient response is optimized via this Adjust bypass and output capacitor network, enabling fast recovery from 10 mA to 3.0 A load steps.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3.0 A continuous - supports high-current graphics controllers and FPGA core rails. |
| VPOWER Dropout | < 0.40 V @ 3.0 A - minimizes power loss and heat generation when VPOWER is primary supply. |
| VCONTROL Dropout | < 1.05 V @ 3.0 A - enables regulation with lower-voltage control rail, e.g., 3.3 V controlling 2.5 V output. |
| Reference Voltage | 1.250 V ±1.0% - ensures precise output setting across temperature (0°C to 150°C junction). |
| Load Regulation | < 0.3% with remote sense - maintains output accuracy despite PCB trace resistance and load transients. |
| Ripple Rejection | 80 dB @ 120 Hz - suppresses input ripple from switching pre-regulators feeding VPOWER/VCONTROL. |
| Thermal Shutdown | 150°C activation with 25°C hysteresis - self-recovering protection during sustained overload or poor heatsinking. |
Pinout & Package
D2PAK-5 package (Case 936AC) with exposed tab electrically connected to VOUT; designed for high-power thermal dissipation and surface-mount assembly. Tab must be soldered to large copper pour for effective heatsinking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1. VSENSE | Kelvin sense input | Connects directly to load VOUT node to eliminate IR drop errors; internal +input of error amplifier. |
| 2. Adjust | Reference bias & feedback node | Carries ~50 µA bias current; sets output via resistor divider (VOUT = 1.26 V × (1 + R2/R1)); bypass cap improves transient response. |
| 3. VOUT | Regulated output / power tab | Emitter of pass transistor; delivers up to 3.0 A; tab is electrically tied to this pin for thermal conduction. |
| 4. VCONTROL | Control circuit supply | Provides bias for error amp and driver; must exceed VOUT by ≥0.9 V (100 mA) to ≥1.3 V (3.0 A); supplies ~1% of IOUT as drive current. |
| 5. VPOWER | Power collector supply | Collector of pass transistor; carries full 3.0 A load current; must exceed VOUT by ≥0.05 V (100 mA) to ≥0.6 V (3.0 A). |
Key Features
| Feature | Design Value |
|---|---|
| Remote voltage sensing | VSENSE pin enables true Kelvin regulation at load point, reducing output error from PCB resistance to <1.0 mV @ 2.5 V/3.0 A step. |
| Dual independent supplies | VPOWER and VCONTROL separation allows optimization of efficiency (low VPOWER dropout) and control rail compatibility (e.g., 3.3 V logic controlling 2.5 V output). |
| Fast transient response | Adjust pin bypass capacitor (0.1 µF) and internal loop design enable rapid recovery from large load steps without external compensation tuning. |
| Integrated protection | Current limit (3.1–4.0 A), short-circuit foldback (~2.0–3.5 A), and thermal shutdown (150°C/25°C hysteresis) ensure robust operation under fault conditions. |
| Backward compatibility | Pin-compatible with standard 3-pin regulators when VCONTROL and VPOWER are tied; retains same footprint while adding remote sense and dual-supply benefits. |
Applications
| Graphics Power Supply | VGA Card Core Rail |
|---|---|
|
Use Scenario: Generating stable 2.5 V supply for GPU memory interface on legacy VGA cards. IC Role / Device Role / Timing Role: Primary LDO regulator delivering 3.0 A with remote sensing to compensate for trace IR drop between regulator and GPU die. Use Value: Maintains <1.0 mV load regulation at GPU pins, preventing timing violations and data corruption during burst memory access. |
Use Scenario: Providing clean, low-noise 3.3 V core voltage for VGA controller ASICs requiring tight tolerance. IC Role / Device Role / Timing Role: Adjustable LDO configured for 3.3 V output using precision resistor divider; VSENSE tied directly to ASIC VDD pin. Use Value: Achieves 0.04% typical load regulation and 80 dB ripple rejection, eliminating need for additional post-LDO filtering. |
| Industrial FPGA I/O Bank | Test Equipment Analog Rail |
|
Use Scenario: Powering configurable I/O banks on Xilinx Spartan FPGAs where voltage must be set to 1.8 V or 2.5 V per bank. IC Role / Device Role / Timing Role: Programmable LDO with external R1/R2 divider; VCONTROL supplied from system 3.3 V rail, VPOWER from higher-efficiency 5 V SMPS. Use Value: Dual-supply architecture reduces total power dissipation by 35% vs. single-rail LDOs at 3.0 A, lowering board temperature rise. |
Use Scenario: Delivering ultra-stable 5.0 V analog reference rail for precision DACs and ADCs in automated test equipment. IC Role / Device Role / Timing Role: Low-noise LDO (0.003% RMS noise) with remote sensing at measurement head connector to reject cable voltage drop. Use Value: Enables 16-bit measurement accuracy by holding output variation to <0.3% over 10 mA–3.0 A load range, even with 150 mm sense traces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT1585A-3.3#PBF | Fixed 3.3 V output; no adjust pin or VSENSE; 4.5 A rating; higher dropout (0.5 V @ 3 A) | Suitable only for fixed-voltage use cases; lacks remote sensing and output adjustability | Select when 3.3 V is sufficient and board space favors smaller TO-220 package |
| TPS7A8300RGRT | 3 A, 1.1 V–3.3 V adj; single-supply; 0.25 V dropout @ 3 A; no VSENSE or dual-supply option | Optimized for low-input-voltage systems (e.g., 3.6 V battery); no remote sensing capability | Select for portable applications needing ultra-low dropout from 3.6 V input, but not for high-accuracy remote loads |
Compared with LT1585A-3.3#PBF and TPS7A8300RGRT, the CS5253-1GDP5 uniquely combines 3.0 A capacity, adjustable output (1.25–5.0 V), dedicated VSENSE for load-point regulation, and dual-supply architecture-enabling superior accuracy in high-current, long-trace industrial and graphics applications where fixed-output or single-supply LDOs fall short.
Availability
CS5253-1GDP5 is available at Aetrix Electronics and suitable for graphics controller power, FPGA I/O banks, industrial test equipment analog rails, and VGA card core voltage applications requiring stable component supply, long-lifecycle support, and Pb-free compliance.
Supply support for CS5253-1GDP5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The CS5253-1GDP5 belongs to onsemi's high-current LDO family designed specifically for graphics, computing, and industrial systems demanding precise remote-sensed regulation, dual-supply flexibility, and robust fault protection at 3 A.
FAQ
What is the correct pin configuration for CS5253-1GDP5 in PCB layout?
The CS5253-1GDP5 uses a D2PAK-5 package with pin 1 = VSENSE, pin 2 = Adjust, pin 3 = VOUT (tab), pin 4 = VCONTROL, pin 5 = VPOWER. The exposed tab is electrically connected to VOUT and must be soldered to a large thermal pad with ≥4 thermal vias to internal ground or heatsink plane. Pin 1 (VSENSE) must be routed separately from VOUT to the load point without sharing traces.
Can CS5253-1GDP5 operate with only VPOWER connected and VCONTROL unconnected?
No. The CS5253-1GDP5 requires both VPOWER and VCONTROL to be active for regulation. If only VPOWER is present, output remains off. If only VCONTROL is present, output current is limited to ~3 mA until VPOWER rises above VOUT + 0.1 V. Both supplies must be sequenced so VCONTROL reaches operating voltage before or simultaneously with VPOWER.
How does remote sensing work on CS5253-1GDP5, and where should VSENSE be connected?
VSENSE is the positive input of the internal error amplifier and must be connected directly to the load's VDD pin-not to the VOUT pin of the CS5253-1GDP5. This Kelvin connection eliminates voltage drop across PCB traces and connectors, ensuring regulation accuracy at the point of load. For best results, route VSENSE with a dedicated trace adjacent to ground and avoid routing near noisy signals.
What is the minimum output capacitance required for stable operation of CS5253-1GDP5?
The CS5253-1GDP5 requires ≥33 µF tantalum or ≥150 µF aluminum electrolytic output capacitance with ESR < 1.0 Ω over temperature. Lower ESR improves transient response and stability margin, especially when using remote sensing. Ceramic capacitors alone are insufficient due to ultralow ESR causing instability; always combine with bulk tantalum/electrolytic or use hybrid networks.
Does CS5253-1GDP5 support adjustable output voltages below 1.25 V?
No. The CS5253-1GDP5 has a fixed 1.25 V internal reference with ±1.0% tolerance, limiting the minimum output to 1.25 V. Output voltage is set by VOUT = 1.26 V × (1 + R2/R1), where R1 connects between VOUT and Adjust, and R2 connects between Adjust and ground. Attempting sub-1.25 V outputs violates the reference specification and results in loss of regulation.
CS5253-1GDP5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- TO-263-6, D2PAK (5 Leads + Tab), TO-263BA
- Packaging:
- Tube
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 13V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- 5V
- Voltage Dropout (Max):
- 1.3V @ 3A
- Current - Output:
- 3A
- Current - Quiescent (Iq):
- 10 mA
- Current - Supply (Max):
- -
- PSRR:
- 80dB (120Hz)
- Control Features:
- -
- Protection Features:
- Over Current, Over Temperature, Short Circuit
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- D2PAK-5
CS5253-1GDP5 FAQ
1.How can I place an order for CS5253-1GDP5 through Aetrix?
Please submit a Request for Quotation (RFQ) for CS5253-1GDP5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CS5253-1GDP5 reliable?
The price and inventory of CS5253-1GDP5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CS5253-1GDP5 is usually 5 days.
3.What payment methods are accepted for CS5253-1GDP5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CS5253-1GDP5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CS5253-1GDP5?
CS5253-1GDP5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CS5253-1GDP5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CS5253-1GDP5?
For technical support, including CS5253-1GDP5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CS5253-1GDP5 requirements.
6.How does Aetrix verify that CS5253-1GDP5 is sourced from the original manufacturer or authorized distributors?
All CS5253-1GDP5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CS5253-1GDP5 meets industry standards.
7.What is the process for return or replacement of CS5253-1GDP5?
All CS5253-1GDP5 units undergo pre-shipment inspection (PSI). If there is an issue with CS5253-1GDP5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CS5253-1GDP5 part is unused and in its original packaging.
Return procedure for CS5253-1GDP5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CS5253-1GDP5 Tags
-
MIC5504-1.8YM5-TR
Microchip Technology
-
MIC5504-3.3YM5-TR
Microchip Technology
-
MIC5365-3.0YC5-TR
Microchip Technology
-
MIC5365-1.8YC5-TR
Microchip Technology
-
MIC5365-2.5YC5-TR
Microchip Technology
-
MIC5365-3.3YC5-TR
Microchip Technology
-
MIC5365-3.3YD5-TR
Microchip Technology
-
MIC5317-3.3YM5-TR
Microchip Technology
-
TLV1117LV33DCYR
Texas Instruments
-
MIC5317-3.3YMT-TZ
Microchip Technology
-
MIC5528-3.3YMT-TR
Microchip Technology
-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
