Infineon Technologies CY28411ZXCT
- Part No.:
- CY28411ZXCT
- Manufacturer:
- Infineon Technologies
- Category:
- Application Specific Clock/Timing
- Package:
- 56-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
CY28411ZXCT.pdf
- Description:
- IC CLK GEN CPU 266MHZ 2CIRC
- Quantity:
- Payment:

- Shipping:

Inventory:1,758
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CY28411ZXCT from Cypress Semiconductor is a clock generator IC compliant with Intel® CK410M specification, designed for Intel Alviso chipset platforms and Pentium-M CPU systems. It delivers differential 100-MHz SRC clocks, fixed 96-MHz dot clock, 48-MHz USB clock, 33-MHz PCI clock, and 14.318-MHz reference clock-all from a single 3.3V supply in a 56-pin SSOP/TSSOP package.
For engineers reviewing the CY28411ZXCT datasheet, CY28411ZXCT pinout, CY28411ZXCT application, or CY28411ZXCT equivalent, key selection criteria include I²C programmability, selectable CPU frequency modes (100/133 MHz), Lexmark spread-spectrum EMI reduction, differential output drive capability, and VTT_PWRGD#-synchronized configuration latching.
Technical Context
The CY28411ZXCT integrates two PLLs: PLL1 locks to the 14.318-MHz crystal input (XIN/XOUT) to generate core timing, while PLL2 synthesizes multiple output frequencies-including CPU, SRC, PCI, and USB clocks-with independent enable/disable control via I²C registers. All differential outputs (CPUT/CPUC, SRCT/SRCC, DOT96T/DOT96C, SRC4_SATAT/SRC4_SATAC) support LVDS-compatible swing and termination.
Frequency selection is determined by FS_A/FS_B/FS_C logic levels sampled once at VTT_PWRGD# assertion, enabling stable boot-time configuration without runtime reconfiguration. The device supports synchronous stop/start of clock outputs via CPU_STP# and PCI_STP# inputs, with configurable Hi-Z or driven behavior during power-down states per register-controlled drive modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Clock Output | 100 MHz or 133 MHz differential pair; selected at power-up via FS pins; drives Pentium-M front-side bus timing. |
| SRC Clock Output | 100 MHz differential (SRCT0/SRCC0–SRCT6/SRCC6); supports Intel CK410M serial reference clock requirements. |
| Dot Clock | Fixed 96 MHz differential (DOT96T/DOT96C); intended for graphics/video subsystem pixel clocking. |
| USB Clock | 48 MHz single-ended (USB_48); meets USB 2.0 full-speed timing; also serves as FS_A input when not used as output. |
| I²C Interface | Standard-mode (100 kHz) SMBus-compatible; slave address 0xD2; enables per-output enable/disable and spread-spectrum control. |
| Supply Voltage | 3.3 V ±0.3 V; separate power domains for CPU, SRC, PCI, REF, USB, and analog PLL sections reduce crosstalk. |
| Crystal Input | 14.31818 MHz parallel-resonant AT-cut crystal; requires 20 pF load capacitance; max aging ±5 ppm over life. |
Pinout & Package
Package: 56-pin SSOP (0.209" body width) and TSSOP (0.244" body width), RoHS-compliant, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CPUT0/CPUC0 | Differential CPU clock output | Primary 100/133 MHz FSB clock pair; terminated internally; requires external 100 Ω differential trace routing. |
| SRCT0/SRCC0 | Differential SRC clock output | First of eight configurable SRC outputs; supports SATA reference clock when enabled via register Byte 0 bit 0. |
| DOT96T/DOT96C | Differential dot clock output | Fixed 96 MHz; dedicated to display controller pixel timing; no frequency select or disable via I²C. |
| USB_48/FS_A | Bi-directional frequency select / clock output | Configured as 48 MHz output or 3.3V-tolerant input for CPU frequency selection; dual-role pin reduces board footprint. |
| VTT_PWRGD# | Configuration latch strobe | Active-low level-sensitive input that samples FS_A/B/C and PCIF0/ITP_EN; initiates one-shot configuration lock. |
| SCLK/SDATA | I²C interface signals | SMBus-compatible clock/data lines; support byte/block read/write; enable dynamic output control post-power-up. |
Key Features
| Feature | Design Value |
|---|---|
| Lexmark Spread Spectrum | Pre-programmed EMI reduction profile applied to CPU and SRC clocks; reduces peak radiated emissions without requiring external components. |
| Selective Output Enable/Disable | All 12 differential clock outputs and 5 single-ended clocks individually controllable via I²C registers; minimizes system-level power during idle states. |
| Synchronous Clock Stop | CPU_STP# and PCI_STP# inputs halt corresponding clock outputs synchronously-no glitches or short pulses-enabling clean power-state transitions. |
| Multi-domain Power Supply | Eight independent VDD/VSS pairs isolate CPU, SRC, PCI, REF, USB, and analog PLL sections; suppresses supply noise coupling between clock domains. |
| PCI Compliance | Meets Intel CK410M timing jitter, skew, and voltage specs for PCI clock outputs (PCI2–PCI5, PCIF0/PCIF1); supports legacy PCI 33 MHz bus timing. |
Applications
| Intel Pentium-M Notebook Platform | SATA Host Controller Timing |
|---|---|
|
Use Scenario: Mobile computing platform using Intel Alviso chipset and Pentium-M processor with integrated graphics and SATA storage. IC Role / Device Role / Timing Role: Primary clock source generating CPU FSB, SRC, PCI, USB, and dot clocks from single crystal. Use Value: Eliminates need for discrete clock buffers and multiple oscillators; reduces BOM count and PCB area while meeting Intel CK410M compliance. |
Use Scenario: SATA host controller requiring low-jitter 100-MHz differential reference clock for PHY layer synchronization. IC Role / Device Role / Timing Role: Provides SRC4_SATAT/SRC4_SATAC differential pair with <1 ps RMS jitter; configured via I²C for SATA Gen1/Gen2 compliance. Use Value: Enables direct connection to SATA PHY without external AC-coupling or termination; supports hot-plug clock enable/disable via register control. |
| Embedded Graphics Subsystem | USB 2.0 Peripheral Hub |
|
Use Scenario: Integrated graphics solution requiring precise 96-MHz pixel clock for LCD or TV-out interface. IC Role / Device Role / Timing Role: Generates fixed-frequency DOT96T/DOT96C differential output with tight phase matching (<50 ps skew). Use Value: Ensures stable video timing without frame tearing or color shift; eliminates need for separate video clock oscillator. |
Use Scenario: USB 2.0 hub controller needing accurate 48-MHz clock for full-speed operation and enumeration. IC Role / Device Role / Timing Role: Supplies USB_48 output with ±0.1% frequency accuracy and low duty-cycle distortion (<45/55%). Use Value: Guarantees reliable USB device enumeration and data transfer; shares same 3.3V rail as USB PHY to minimize supply noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT 87010AGLFT | Supports DDR2 memory clocks and PCIe reference; lacks Lexmark spread spectrum; uses different I²C register map. | Targeted at dual-core desktop platforms with DDR2 memory; not CK410M-compliant. | Choose only if migrating to non-Intel Alviso platforms requiring DDR2/PCIe timing. |
| ICS952002AF | Single 3.3V supply; no differential dot clock; supports 125-MHz SRC but not 96-MHz dot clock. | Designed for Intel 945GME chipset; lacks dedicated video pixel clock output. | Use only for cost-sensitive designs omitting integrated graphics or requiring lower SRC count. |
Compared with IDT 87010AGLFT and ICS952002AF, the CY28411ZXCT uniquely provides Intel CK410M-compliant 96-MHz differential dot clock and Lexmark EMI profile-critical for notebook platforms where display timing and radiated emissions are tightly constrained.
Availability
CY28411ZXCT is available at Aetrix Electronics and suitable for Intel Pentium-M notebook platforms, SATA host controller timing, embedded graphics subsystems, and USB 2.0 peripheral hubs requiring stable component supply across long-lifecycle industrial and commercial programs.
Supply support for CY28411ZXCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Cypress Semiconductor Corporation is a U.S.-based semiconductor company specializing in high-performance timing, memory, and programmable logic solutions for computing and communications markets.
The CY28411 belongs to Cypress's CK410M-compliant clock generator product line, engineered specifically to meet Intel's Alviso chipset timing architecture and EMI requirements for mobile computing platforms.
FAQ
What crystal specifications are required for CY28411ZXCT?
The CY28411ZXCT requires a 14.31818 MHz parallel-resonant AT-cut crystal with 20 pF load capacitance, maximum 0.1 mW drive level, and ±35 ppm initial tolerance. Series-resonant crystals must not be substituted, as they cause frequency error exceeding specification due to incorrect loading.
How is CPU frequency selected on CY28411ZXCT?
CPU frequency (100 MHz or 133 MHz) is selected by applying logic levels to FS_A, FS_B, and FS_C prior to VTT_PWRGD# assertion. The device samples these pins once at VTT_PWRGD# low-to-high transition and locks the configuration; subsequent changes have no effect unless reset.
Can all differential outputs be disabled independently?
Yes-each differential output (CPUT/CPUC, SRCT/SRCC, DOT96T/DOT96C, SRC4_SATAT/SRC4_SATAC) has dedicated enable bits in I²C registers (Bytes 0–2). For example, CPUT0/CPUC0 is controlled by Bit 1 of Control Register 1, allowing per-output power gating.
Does CY28411ZXCT support spread spectrum on all clock outputs?
No-spread spectrum is applied only to CPU and SRC clock outputs (CPUT/CPUC and SRCT/SRCC) using the Lexmark profile. Dot clock (DOT96), USB_48, PCI, and REF outputs operate at fixed frequency without modulation.
CY28411ZXCT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- -
- Package/Case:
- 56-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- PLL:
- Yes
- Main Purpose:
- Intel CPU Servers
- Input:
- LVTTL, Crystal
- Output:
- Clock
- Number of Circuits:
- 2
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- No/Yes
- Frequency - Max:
- 266MHz
- Voltage - Supply:
- 3.135V ~ 3.465V
- Operating Temperature:
- 0°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 56-TSSOP II
CY28411ZXCT FAQ
1.How can I place an order for CY28411ZXCT through Aetrix?
Please submit a Request for Quotation (RFQ) for CY28411ZXCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY28411ZXCT reliable?
The price and inventory of CY28411ZXCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY28411ZXCT is usually 5 days.
3.What payment methods are accepted for CY28411ZXCT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY28411ZXCT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY28411ZXCT?
CY28411ZXCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY28411ZXCT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY28411ZXCT?
For technical support, including CY28411ZXCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY28411ZXCT requirements.
6.How does Aetrix verify that CY28411ZXCT is sourced from the original manufacturer or authorized distributors?
All CY28411ZXCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY28411ZXCT meets industry standards.
7.What is the process for return or replacement of CY28411ZXCT?
All CY28411ZXCT units undergo pre-shipment inspection (PSI). If there is an issue with CY28411ZXCT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY28411ZXCT part is unused and in its original packaging.
Return procedure for CY28411ZXCT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY28411ZXCT Tags

-
LMK00334RTVRQ1
Texas Instruments
.jpg)
-
DSC557-0344FI0T
Microchip Technology

-
9FGV0241AKILFT
Renesas Electronics Corporation

-
9DBL0452CKILFT
Renesas Electronics Corporation
.jpg)
-
DSC557-0344FL1T
Microchip Technology
-
RC19008AGND#KB0
Renesas Electronics Corporation
-
RC19008AGND#BB0
Renesas Electronics Corporation

-
9DB403DGILFT
Renesas Electronics Corporation

-
9DB233AGILFT
Renesas Electronics Corporation

-
9DB803DGILFT
Renesas Electronics Corporation

-
9FGL0851DKILFT
Renesas Electronics Corporation
-
AB-557-03-HCHC-F-L-C-T
Abracon LLC
Tech Hub
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…

