My Inquiry
My Account
Infineon Technologies CY28RS400OXC
- Part No.:
- CY28RS400OXC
- Manufacturer:
- Infineon Technologies
- Category:
- Application Specific Clock/Timing
- Package:
- 56-BSSOP (0.295", 7.50mm Width)
- Datasheet:
-
CY28RS400OXC.pdf
- Description:
- IC CLK GEN CPU 266MHZ 2CIRC
- Quantity:
- Payment:
- Shipping:
Inventory:1,730
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CY28RS400OXC from Cypress Semiconductor is a clock generator IC designed specifically for the ATI RS400 chipset platform, providing synchronized differential CPU clocks (up to 266 MHz), six 100-MHz differential SRC outputs, 33-MHz PCI, 48-MHz USB, and three 14.318-MHz REF clocks. It supports Intel CPU frequency selection via FS_A/B/C and 409_410 pins, features I²C programmability with readback, and integrates Lexmark spread-spectrum EMI reduction.
For engineers reviewing the CY28RS400OXC datasheet, CY28RS400OXC pinout, CY28RS400OXC application, or CY28RS400OXC equivalent, key selection criteria include differential output compliance with Intel Type-X/Type-5 buffers, VTT_PWRGD#-latched frequency configuration, per-output enable/disable via I²C registers, and multi-rail 3.3V power domain separation (VDD_CPU, VDD_SRC, VDD_PCI, etc.).
Technical Context
The CY28RS400OXC implements two independent PLLs: PLL1 locks to the 14.318-MHz crystal input (XIN/XOUT) to generate CPU and REF clocks; PLL2 synthesizes 100-MHz SRC clocks and derives 48-MHz USB and 33-MHz PCI outputs via integer dividers. Frequency selection is statically latched on VTT_PWRGD# assertion, enabling deterministic boot-time clock configuration.
I²C interface (SCLK/SDATA) provides full register access to eight control bytes-including per-output enables, spread-spectrum depth (-0.35% or -0.50%), drive strength (1x/2x), and CLKREQ#-controlled stop modes-allowing dynamic runtime reconfiguration of clock trees without reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Clock Range | 100–266 MHz; selectable via 3-bit FS_A/B/C + 409_410 latch at VTT_PWRGD# edge |
| SRC Clock Outputs | 6 differential 100-MHz pairs (SRCT/CC[0:5]); Intel Type-X compliant, individually controllable |
| USB Clock | 48-MHz single-ended output (USB_48); Intel Type-3A buffer, programmable 1x/2x drive strength |
| PCI Clock | 33-MHz single-ended output (PCI0/409_410); Intel Type-5 buffer, dual-role as frequency table selector |
| REF Clocks | Three 14.318-MHz outputs (REF0/1/2); Intel Type-5, independently enableable via I²C register Byte 1 |
| Spread Spectrum | Configurable -0.35% or -0.50% modulation depth on CPU/SRC clocks; Lexmark-compliant EMI reduction |
| Supply Voltages | Dedicated 3.3V rails: VDD_CPU, VDD_SRC, VDD_PCI, VDD_REF, VDD_48, VDDA, VDD_SRCS - minimizes cross-domain noise coupling |
Pinout & Package
56-pin SSOP/TSSOP package with spatially segregated power and ground domains: VDD_SRC/VSS_SRC for SRC outputs (pins 14,15,20,21,26,35,36), VDD_CPU/VSS_CPU for CPU outputs (pins 45,44), VDD_PCI/VSS_PCI for PCI (51,49), VDD_REF/VSS_REF for REF (56,55), VDD_48/VSS_48 for USB (3,5), and isolated analog supplies VDDA/VSSA (39,38).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CPUT/C[2:0] (pins 47,46,43,42,41,40) | Differential CPU clock outputs | Intel Type-X buffers; each pair drives CPU address/data strobes with matched skew |
| SRCT/C[5:0] (pins 12,13,16–19,22–25,34,33) | Differential 100-MHz SRC clocks | Supports ATI RS400 HyperTransport links; individually enabled/disabled via I²C Byte 0 |
| USB_48 (pin 4) | 48-MHz USB clock output | Intel Type-3A buffer; drive strength configurable in I²C Byte 2 bit 6 |
| PCI0/409_410 (pin 50) | 33-MHz PCI clock / frequency table select | Active-low internal pull-down; selects CK409 (logic 1) or CK410 (logic 0) CPU tables |
| VTT_PWRGD# (pin 6) | Power-good strobe input | Latches FS_A/B/C/409_410 states; one-shot sampling ensures stable VTT before clock configuration |
| SCLK/SDATA (pins 7,8) | I²C serial interface | SMBus-compatible; supports byte/block read/write; slave address 0xD2; enables runtime clock management |
Key Features
| Feature | Design Value |
|---|---|
| Multi-rail 3.3V power architecture | Isolates CPU, SRC, PCI, REF, USB, and analog domains to prevent supply noise coupling between clock domains |
| VTT_PWRGD#-latched frequency selection | Ensures deterministic clock initialization by freezing FS_A/B/C/409_410 states at processor VTT stabilization |
| Lexmark-compliant spread spectrum | Reduces peak EMI by -0.35% or -0.50% modulation depth on CPU/SRC clocks without affecting timing margins |
| Per-output I²C control | Enables/disables individual clocks (e.g., disable unused SRC pairs) and configures drive strength or stop behavior |
| CLKREQ#-gated SRC outputs | Two dedicated CLKREQ#0/1 inputs allow Minicard-compliant dynamic stopping of SRC clocks during low-power states |
Applications
| ATI RS400-Based Motherboards | Intel Pentium 4 Socket 478 Platforms |
|---|---|
Use Scenario: Desktop motherboard using ATI RS400 northbridge and southbridge with HyperTransport interconnect. IC Role / Device Role / Timing Role: Primary clock synthesizer generating all core timing signals: CPU front-side bus, HT link clocks, PCI, USB, and reference clocks. Use Value: Eliminates need for multiple discrete oscillators; ensures phase alignment between CPU and SRC clocks critical for HT signal integrity. | Use Scenario: Socket 478-based industrial PC requiring compatibility with Intel Pentium 4 processors and CK410/CK409 frequency tables. IC Role / Device Role / Timing Role: System clock generator implementing Intel Type-X/Type-5 buffered outputs with VTT_PWRGD#-synchronized boot configuration. Use Value: Guarantees correct CPU frequency selection at power-on via hardware-latched FS pins, avoiding firmware dependency. |
| Embedded Systems with Spread-Spectrum EMI Control | Minicard-Compliant Expansion Modules |
Use Scenario: Fanless embedded controller where radiated emissions must meet FCC Class B limits without shielding. IC Role / Device Role / Timing Role: EMI-optimized clock source applying Lexmark-profile spread spectrum to CPU and SRC clocks. Use Value: Achieves >10 dB peak EMI reduction at fundamental frequencies while maintaining <±50 ppm stability across temperature. | Use Scenario: PCIe/PCI Mini Card add-in module requiring dynamic clock gating per specification. IC Role / Device Role / Timing Role: Clock provider with CLKREQ#0/1 inputs enabling Minicard-compliant tri-state control of SRC outputs during sleep states. Use Value: Reduces system standby power by disabling unused 100-MHz differential clocks without requiring host software intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT 87010AGLFT | Single 100-MHz SRC output; no CPU clock generation; lacks VTT_PWRGD# latch and FS pin interface | Targeted at generic PCI/USB timing, not ATI RS400 or Intel CPU platforms | Select only if only SRC clock synthesis is required and CPU/REF/PCI clocks are provided externally |
| Cypress CY28400ZXC | Same 56-pin SSOP package; supports AMD Athlon 64 platforms instead of Intel P4; different FS pin mapping and REF clock count | Designed for nForce2/nForce3 chipsets; incompatible CPU frequency tables and I²C register layout | Not interchangeable; requires full hardware and firmware redesign due to differing pin functions and register definitions |
Compared with IDT 87010AGLFT and CY28400ZXC, the CY28RS400OXC uniquely integrates CPU clock synthesis, VTT_PWRGD#-latched configuration, and ATI RS400-specific SRC topology - making it irreplaceable in its target platform without board-level redesign.
Availability
CY28RS400OXC is available at Aetrix Electronics and suitable for desktop motherboards, Intel Pentium 4 platforms, and ATI RS400-based embedded systems requiring stable component supply and long-term lifecycle support.
Supply support for CY28RS400OXC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Cypress Semiconductor (now part of Infineon) is a fabless semiconductor company specializing in timing, memory, and programmable logic solutions for computing and communications infrastructure.
The CY28RS400 belongs to Cypress's high-precision clock generator product line, engineered specifically for chipset-coordinated timing in Intel and ATI platform designs with strict skew, jitter, and EMI requirements.
FAQ
What crystal specifications are required for stable operation?
The CY28RS400OXC requires a parallel-resonance 14.318-MHz crystal with specified load capacitance (CL). Substituting a series-resonance crystal causes ~300-ppm frequency error and violates ppm stability specs. Total capacitive loading must be twice the crystal's CL value due to series configuration of external trim caps, and trace/pin capacitance must be included in calculation.
How does VTT_PWRGD# affect frequency selection?
VTT_PWRGD# is a level-sensitive strobe that samples FS_A, FS_B, FS_C, and PCI0/409_410 inputs once when driven low, latching their logic states to configure CPU frequency. After this one-shot sampling, further transitions on those pins are ignored - ensuring deterministic boot-time clock setup independent of firmware timing.
Can the I²C interface be used during system operation?
No. The I²C interface is intended for system initialization only. Register changes (e.g., enabling/disabling clocks or adjusting spread-spectrum depth) must occur before normal operation begins. The interface cannot be used for real-time power management or dynamic reconfiguration during active system runtime.
What is the function of the CLKREQ# pins?
CLKREQ#0 and CLKREQ#1 are Minicard-compliant control inputs that dynamically gate selected SRC clock outputs. When asserted high, they place configured SRCT/C outputs into high-impedance state - reducing power and noise during low-power modes. Each pin controls a subset of SRC outputs as defined in I²C registers Bytes 4 and 5.
CY28RS400OXC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- -
- Package/Case:
- 56-BSSOP (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- PLL:
- Yes
- Main Purpose:
- CPU Graphics
- Input:
- LVTTL, Crystal
- Output:
- Clock
- Number of Circuits:
- 2
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- No/Yes
- Frequency - Max:
- 266MHz
- Voltage - Supply:
- 3.135V ~ 3.465V
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 56-SSOP
CY28RS400OXC FAQ
1.How can I place an order for CY28RS400OXC through Aetrix?
Please submit a Request for Quotation (RFQ) for CY28RS400OXC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY28RS400OXC reliable?
The price and inventory of CY28RS400OXC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY28RS400OXC is usually 5 days.
3.What payment methods are accepted for CY28RS400OXC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY28RS400OXC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY28RS400OXC?
CY28RS400OXC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY28RS400OXC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY28RS400OXC?
For technical support, including CY28RS400OXC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY28RS400OXC requirements.
6.How does Aetrix verify that CY28RS400OXC is sourced from the original manufacturer or authorized distributors?
All CY28RS400OXC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY28RS400OXC meets industry standards.
7.What is the process for return or replacement of CY28RS400OXC?
All CY28RS400OXC units undergo pre-shipment inspection (PSI). If there is an issue with CY28RS400OXC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY28RS400OXC part is unused and in its original packaging.
Return procedure for CY28RS400OXC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CY28RS400OXC Tags
-
LMK00334RTVRQ1
Texas Instruments
.jpg)
-
DSC557-0344FI0T
Microchip Technology
-
9FGV0241AKILFT
Renesas Electronics Corporation
-
9DBL0452CKILFT
Renesas Electronics Corporation
-
DSC557-0344FL1T
Microchip Technology
-
RC19008AGND#KB0
Renesas Electronics Corporation
-
RC19008AGND#BB0
Renesas Electronics Corporation
-
9DB403DGILFT
Renesas Electronics Corporation
-
9DB233AGILFT
Renesas Electronics Corporation
-
9DB803DGILFT
Renesas Electronics Corporation
-
9FGL0851DKILFT
Renesas Electronics Corporation
-
AB-557-03-HCHC-F-L-C-T
Abracon LLC
Tech Hub
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
