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Infineon Technologies CY28RS400ZXC
- Part No.:
- CY28RS400ZXC
- Manufacturer:
- Infineon Technologies
- Category:
- Application Specific Clock/Timing
- Package:
- 56-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
CY28RS400ZXC.pdf
- Description:
- IC CLK GEN CPU 266MHZ 2CIRC
- Quantity:
- Payment:
- Shipping:
Inventory:2,091
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Product details
Overview
CY28RS400ZXC from Cypress Semiconductor is a programmable clock generator designed specifically for the ATI RS400 chipset platform, delivering synchronized differential CPU (up to 266 MHz), 100-MHz SRC, 48-MHz USB, and 33-MHz PCI clocks with I²C-configurable output enables, spread-spectrum control, and Intel Type-X/Type-5/Type-3A buffer compliance.
For engineers reviewing the CY28RS400ZXC datasheet, CY28RS400ZXC pinout, CY28RS400ZXC application, or CY28RS400ZXC equivalent, this device supports precise frequency selection via FS_A/B/C and 409_410 latched inputs, real-time I²C register readback, Lexmark-compliant EMI reduction, and multi-rail 3.3V power domain isolation for CPU/SRC/PCI/USB/REF outputs.
Technical Context
The CY28RS400ZXC integrates two PLLs: one for CPU/SRC/PCI/USB generation from a 14.318-MHz crystal input (XIN/XOUT), and another dedicated to REF clock synthesis. It implements Intel's CK409/CK410 frequency tables with VTT_PWRGD#-latched FS_A/B/C/409_410 sampling, enabling deterministic boot-time clock configuration.
Its serial interface uses SMBus-compatible SCLK/SDATA with slave address 0xD2, supporting byte/block reads/writes to eight control registers that manage per-output enable/disable, spread-spectrum depth (–0.35% or –0.50%), drive strength (1x/2x), and CLKREQ#0/1-controlled stop modes for SRC outputs - all without requiring runtime reconfiguration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Clock Output | Up to 266 MHz differential (Intel Type-X), selectable via latched FS_A/B/C/409_410 inputs |
| SRC Clock Output | 100 MHz differential (SRCT/C[5:0]), Intel Type-X compliant with CLKREQ#0/1 gating |
| USB Clock | 48 MHz single-ended (USB_48), Intel Type-3A buffer with configurable 1x/2x drive strength |
| PCI Clock | 33 MHz single-ended (PCI0/409_410), Intel Type-5 buffer with frequency table selection |
| REF Clock Outputs | Three 14.318 MHz single-ended outputs (REF0/FSB, REF1/FSA, REF2) with individual enable control |
| I²C Interface | SMBus-compatible (SCLK/SDATA), slave address 0xD2h, supports byte/block read/write and register readback |
| Spread Spectrum | Lexmark-compliant EMI reduction: –0.35% or –0.50% modulation depth, configurable per clock domain |
Pinout & Package
56-pin SSOP/TSSOP package with isolated power/ground domains: VDD_CPU/VSS_CPU (CPU outputs), VDD_SRC/VSS_SRC (SRC outputs), VDD_PCI/VSS_PCI (PCI), VDD_REF/VSS_REF (REF), VDD_48/VSS_48 (USB), VDD_SRCS/VSS_SRCS (SRCS), and analog VDDA/VSSA for PLL stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XIN / XOUT | Crytal oscillator interface | 14.318-MHz parallel-resonant crystal connection; incorrect series-resonant crystal causes >300-ppm frequency error |
| CPUT/C[2:0] | Differential CPU clock outputs | Three pairs of Intel Type-X buffers; gated by CPU_STP# with 2-cycle disable latency |
| SRCT/C[5:0] | Differential SRC clock outputs | Six pairs of 100-MHz Intel Type-X outputs; individually controllable via I²C or CLKREQ#0/1 |
| USB_48 | USB clock output | 48-MHz single-ended Intel Type-3A buffer; drive strength configurable via Control Register 2 |
| PCI0/409_410 | PCI clock / frequency table select | 33-MHz output + latched selector for CK409 (logic 1) or CK410 (logic 0) CPU frequency tables |
| REF0/FSB, REF1/FSA, REF2 | Reference clock outputs | Three independent 14.318-MHz outputs; each individually enabled/disabled via Control Register 1 |
| SCLK / SDATA | I²C interface | SMBus-compatible bus with internal pull-ups; tri-stated in power-down mode |
| VTT_PWRGD#/PD | Power-good strobe | Level-sensitive active-low input that latches FS_A/B/C/409_410 values; enables one-shot configuration |
| CLKREQ#[0:1] | SRC output enable control | Minicard-compliant active-low signals; gate SRCT/C outputs per Control Registers 4–5 |
| CPU_STP# | CPU clock gate | Active-low input disabling CPUT/C outputs after two clock cycles; configurable per CPU output via Control Register 3 |
Key Features
| Feature | Design Value |
|---|---|
| Configurable Spread Spectrum | Two Lexmark-compliant modulation depths (–0.35% or –0.50%) per clock domain to reduce EMI peak emissions |
| Per-Output Enable Control | Individual I²C-accessible enables for all 12 clock outputs (CPUT/C, SRCT/C, REF, USB, PCI) via eight control registers |
| Frequency Table Selection | Hardware-latched CK409/CK410 mode selection via PCI0/409_410 pin, eliminating software dependency at boot |
| Multi-Rail Power Isolation | Dedicated VDD/VSS supplies per functional block (CPU, SRC, PCI, USB, REF, SRCS, analog) minimize cross-domain noise coupling |
| I²C Readback Capability | Full register read access allows runtime verification of output states, spread-spectrum settings, and latch values (FS_A/B/C, 409_410) |
Applications
| ATI RS400-Based Motherboards | Intel Pentium 4 Desktop Platforms |
|---|---|
Use Scenario: Mainboard clocking for AMD/ATI RS400 chipset with dual-channel DDR memory and AGP 8x graphics interface. IC Role / Device Role / Timing Role: Primary clock synthesizer generating synchronized CPU, SRC, PCI, USB, and REF clocks with hardware-latched frequency selection. Use Value: Eliminates need for discrete clock buffers and reduces BOM count by integrating six differential SRC pairs, three REF outputs, and PCIe/USB timing in one 56-pin IC. | Use Scenario: Socket 478 motherboard supporting Intel Pentium 4 processors up to 266 MHz FSB. IC Role / Device Role / Timing Role: CK409/CK410-compliant clock generator providing differential CPU clock pairs and 100-MHz SRC clocks for front-side bus and HyperTransport links. Use Value: Enables deterministic boot-time clock configuration via VTT_PWRGD#-latched FS pins, ensuring stable CPU initialization without firmware intervention. |
| Embedded Industrial PCs | Legacy PCI/USB Expansion Systems |
Use Scenario: Fanless industrial PC using RS400-based chipset for machine vision or HMI applications requiring long-term component availability. IC Role / Device Role / Timing Role: System timing hub delivering low-jitter 33-MHz PCI, 48-MHz USB, and 14.318-MHz REF clocks with spread-spectrum EMI control. Use Value: Analog-ground-isolated VSSA and dedicated VDDA ensure PLL stability under thermal stress, meeting industrial temperature range requirements. | Use Scenario: PCI add-in card or mezzanine module requiring backward-compatible 33-MHz PCI clock and 48-MHz USB timing. IC Role / Device Role / Timing Role: Pin-compatible clock source for legacy expansion interfaces, with independent enable/disable of PCI0 and USB_48 outputs. Use Value: Configurable drive strength (1x/2x) on USB_48 and PCI0 ensures signal integrity across varying trace lengths and load capacitances. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ICS952006AGT | Single 14.318-MHz crystal input; supports only CK410 table; no I²C readback; fixed –0.5% spread spectrum | Lacks per-output enable control and REF clock flexibility; limited to single-frequency-table platforms | Select when I²C configurability and multi-table support are unnecessary and cost is primary constraint |
| ICS952012AGT | Includes integrated 14.318-MHz crystal oscillator; adds PCIe 1.0 reference clock (100 MHz); no CLKREQ# support | Targets PCIe-native designs; lacks Minicard-compliant CLKREQ#0/1 gating for SRC outputs | Select for PCIe-focused systems needing embedded oscillator and simplified layout, not RS400-specific timing |
Compared with ICS952006AGT and ICS952012AGT, the CY28RS400ZXC uniquely combines CK409/CK410 dual-table support, full I²C register readback, CLKREQ#0/1-gated SRC outputs, and Lexmark-specified spread-spectrum modulation - making it irreplaceable for RS400 chipset compliance and field-serviceable clock tuning.
Availability
CY28RS400ZXC is available at Aetrix Electronics and suitable for ATI RS400 motherboard design, Intel Pentium 4 desktop platforms, and industrial embedded PCs requiring stable component supply and long-lifecycle support.
Supply support for CY28RS400ZXC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Cypress Semiconductor (now part of Infineon) is a fabless semiconductor company specializing in high-performance timing, memory, and programmable logic solutions for computing and communications infrastructure.
The CY28RS400 belongs to Cypress's legacy clock generator product line, engineered specifically for AMD/ATI chipset platforms to replace discrete clock trees with integrated, configurable, and EMI-optimized timing solutions.
FAQ
What crystal type and loading is required for CY28RS400ZXC?
The CY28RS400ZXC requires a parallel-resonant 14.318-MHz crystal. Using a series-resonant crystal causes >300-ppm frequency error. Total load capacitance must be twice the crystal's specified CL due to series-connected trim capacitors; trace and pin capacitance must be included in calculation.
How does VTT_PWRGD# affect frequency selection?
VTT_PWRGD# is a level-sensitive strobe that latches FS_A, FS_B, FS_C, and 409_410 logic states on its falling edge. Once sampled low, further transitions on these pins are ignored - ensuring deterministic boot-time configuration without race conditions or firmware dependency.
Can CY28RS400ZXC support both CK409 and CK410 CPU frequency tables?
Yes. The PCI0/409_410 pin determines table selection: logic 0 selects the CK410 table (using FS_A/FS_B/FS_C), and logic 1 selects the CK409 table (using only FS_A/FS_B). This dual-table capability enables compatibility across multiple Intel CPU generations on the same board design.
Is I²C communication possible during system operation?
No. The I²C interface is intended for system initialization only. Register changes cannot be made during runtime power management; all configurations must be completed before normal operation begins. The interface is tri-stated in power-down mode.
CY28RS400ZXC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- -
- Package/Case:
- 56-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- PLL:
- Yes
- Main Purpose:
- CPU Graphics
- Input:
- LVTTL, Crystal
- Output:
- Clock
- Number of Circuits:
- 2
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- No/Yes
- Frequency - Max:
- 266MHz
- Voltage - Supply:
- 3.135V ~ 3.465V
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 56-TSSOP II
CY28RS400ZXC FAQ
1.How can I place an order for CY28RS400ZXC through Aetrix?
Please submit a Request for Quotation (RFQ) for CY28RS400ZXC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CY28RS400ZXC reliable?
The price and inventory of CY28RS400ZXC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CY28RS400ZXC is usually 5 days.
3.What payment methods are accepted for CY28RS400ZXC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CY28RS400ZXC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CY28RS400ZXC?
CY28RS400ZXC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CY28RS400ZXC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CY28RS400ZXC?
For technical support, including CY28RS400ZXC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CY28RS400ZXC requirements.
6.How does Aetrix verify that CY28RS400ZXC is sourced from the original manufacturer or authorized distributors?
All CY28RS400ZXC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CY28RS400ZXC meets industry standards.
7.What is the process for return or replacement of CY28RS400ZXC?
All CY28RS400ZXC units undergo pre-shipment inspection (PSI). If there is an issue with CY28RS400ZXC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CY28RS400ZXC part is unused and in its original packaging.
Return procedure for CY28RS400ZXC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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