onsemi CYII5SM1300AB-QWC

Overview

CYII5SM1300AB-QWC from Cypress Semiconductor is a monochrome 1.3 MP CMOS image sensor with global and rolling shutter, 1280 × 1024 active pixels, 6.7 µm square pixels, and on-chip 10-bit ADC-designed for industrial machine vision systems requiring high-speed, low-noise imaging under controlled lighting.

For engineers reviewing the CYII5SM1300AB-QWC datasheet, pinout, applications, or equivalent options, key selection criteria include shutter mode flexibility (global/rolling), 27 fps full-frame performance, 84-pin LCC package compatibility, and analog output interface timing alignment with external ADCs.

Technical Context

The CYII5SM1300AB-QWC implements a 4-transistor pixel architecture enabling true global shutter operation via synchronized reset and sample control, while supporting rolling shutter for higher frame rates in sub-sampled modes. Its dual-Y-addressing register architecture separates readout and reset paths to eliminate smear during global exposure.

It integrates column-level fixed-pattern noise correction via double sampling, programmable gain/offset amplification (4-bit gain, 7-bit offset), and supports windowing down to 2×1 pixels. The analog output (PXL_OUT) operates at 40 MHz pixel rate with 260 Ω output impedance and requires external connection to ADC_IN (pin 69) for digitization.

Key Specifications

Pinout & Package

Package: 84-pin ceramic leadless chip carrier (LCC), hermetically sealed, glass-lid optional (QWC = no glass lid). Pin layout follows standard IBIS5-B-1300 floor plan with dedicated analog/digital/power/ground groups and signal isolation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CMOS image sensor applications.

Compared with AR0130CS and AS5700-40, the CYII5SM1300AB-QWC uniquely balances global/rolling shutter duality, 6.7 µm pixel sensitivity, and 0–65 °C operation-making it optimal for factory-floor machine vision where motion artifact elimination and ambient thermal stability are co-critical.

Availability

CYII5SM1300AB-QWC is available at Aetrix Electronics and suitable for machine vision inspection, traffic monitoring, industrial robotics guidance, and automated optical sorting requiring stable component supply across multi-year production cycles.

Supply support for CYII5SM1300AB-QWC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Cypress Semiconductor (now part of Infineon Technologies) designs high-performance mixed-signal ICs for industrial, automotive, and IoT applications, with emphasis on reliability and system-level integration.

The IBIS5 family-including CYII5SM1300AB-QWC-is engineered specifically for demanding industrial vision systems requiring deterministic shutter control, low-noise analog signal chains, and robust packaging for factory environments.

FAQ

What shutter modes does the CYII5SM1300AB-QWC support, and how do they differ in use?

The CYII5SM1300AB-QWC supports both global and rolling shutter. Global shutter captures all pixels simultaneously-essential for motion-free imaging of fast-moving objects like conveyor belts. Rolling shutter reads rows sequentially, enabling higher frame rates (up to 106 fps at reduced resolution) but introducing skew in moving scenes. Selection is configured via sequencer registers and affects bias voltage settings (e.g., VDDH/VDDR_LEFT at +4.5 V for global mode).

How is the analog output of the CYII5SM1300AB-QWC interfaced to an external ADC?

The CYII5SM1300AB-QWC outputs analog pixel data on PXL_OUT (pin 28), which must be externally wired to ADC_IN (pin 69). This connection is not internal-the sensor lacks an integrated ADC path. Routing must use short, direct top-layer traces (<10 mm), avoid vias, and maintain 260 Ω impedance matching to preserve 40 MHz signal fidelity and minimize noise coupling.

Does the CYII5SM1300AB-QWC include on-chip fixed pattern noise (FPN) correction, and how is it implemented?

Yes, the CYII5SM1300AB-QWC implements on-chip FPN correction via double sampling: each pixel's signal and reset level are sampled separately in column amplifiers, then subtracted to cancel pixel-to-pixel and amplifier offset variations. This reduces measured FPN to 4.5 LSB10 and is active in both global and rolling shutter modes without user intervention.

What are the power supply requirements for the CYII5SM1300AB-QWC, and why are separate analog/digital rails critical?

The CYII5SM1300AB-QWC requires three independent supply groups: analog (VDDA/VDDH/VDDR_LEFT, 3.0–4.5 V), digital (VDDD, 3.0–3.6 V), and I/O (3.3 V). Separate rails are critical because the sensor has no on-chip power rejection-any noise on VDDA directly modulates pixel output, increasing temporal noise. Local 100 nF + 10 µF decoupling at each supply pin is mandatory.

Can the CYII5SM1300AB-QWC perform region-of-interest (ROI) readout, and what is the minimum window size?

Yes, the CYII5SM1300AB-QWC supports fully programmable ROI readout via user-defined row/column start/stop addresses. The minimum configurable window is 2×1 pixels-achieved by setting X_START=X_END=0 and Y_START=Y_END=0 in the sequencer registers. This enables extreme digital zoom for high-magnification inspection without resampling artifacts.