Renesas DA14585-00000AT2

Overview

DA14585-00000AT2 from Renesas is a Bluetooth 5.0–compliant, ultra-low-power SoC integrating ARM Cortex-M0™ CPU (16 MHz), 96 kB SRAM (32+16+16+32 kB configurable retention), 64 kB OTP, 128 kB ROM, and integrated BLE radio with -93 dBm sensitivity and +0 dBm TX output. It supports standalone operation in remote controls, beacons, and medical sensors.

For engineers reviewing the DA14585-00000AT2 datasheet, DA14585-00000AT2 pinout, DA14585-00000AT2 application, or DA14585-00000AT2 equivalent, key selection factors include QFN40 package compatibility, 0.9–3.6 V supply range, cold boot at 0.9 V (boost mode), dual UARTs with hardware flow control, and PDM/PCM audio interface support for MEMS microphone integration.

Technical Context

The DA14585-00000AT2 implements a dedicated Link Layer Processor and AES-128 encryption engine alongside its ARM Cortex-M0™ core, enabling concurrent protocol stack execution and secure BLE communication without host MCU intervention. Its radio integrates single-wire antenna interface, eliminating RF matching components and TX/RX switching circuitry.

Power architecture includes configurable buck/boost DC-DC converter supporting coin (1.5 V) and alkaline (3.0 V) cells, plus 10-bit ADC for battery monitoring. Clock system combines 16 MHz ±20 ppm crystal, 32 kHz ±50 ppm crystal, and RCX oscillator (±500 ppm), enabling precise timing across sleep/wake transitions.

Key Specifications

Pinout & Package

DA14585-00000AT2 is packaged in a 40-pin QFN (5 mm × 5 mm × 0.9 mm, 0.4 mm pitch) with exposed thermal pad. Pin functions are defined by programmable GPIO matrix and include dedicated RFIO, VBAT, VDD, GND, XTAL16M, XTAL32K, SWDIO/SWCLK, UART0/1, SPI+, I²C, PDM/PCM, QDEC, ADC inputs, and wake-up-capable GPIOs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Bluetooth 5.0 SoC applications.

Compared with nRF52833 DK and CC2642R, DA14585-00000AT2 delivers unique value in ultra-low-voltage operation (0.9 V), integrated audio subsystem (PDM/PCM/SRC), and minimal BOM count due to single-wire antenna and on-die DC-DC - critical for space-constrained, battery-limited consumer devices.

Availability

DA14585-00000AT2 is available at Aetrix Electronics and suitable for remote controls, beacons, and connected medical sensors requiring stable component supply, long-term lifecycle assurance, and qualified sourcing from Renesas-authorized channels.

Supply support for DA14585-00000AT2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader delivering trusted embedded solutions for automotive, industrial, infrastructure, and IoT markets, with over 40 years of microcontroller and connectivity IP expertise.

The DA14585-00000AT2 belongs to the SmartBond™ Bluetooth SoC product line, engineered specifically for ultra-low-power, small-footprint wireless edge nodes where battery lifetime, RF integration, and audio capability are primary design constraints.

FAQ

What is the minimum operating voltage for DA14585-00000AT2 during cold boot?

The DA14585-00000AT2 supports cold boot at 0.9 V in boost mode and 1.8 V in buck mode. This enables full utilization of zinc-air and partially discharged coin cells, extending usable battery capacity beyond conventional 1.0 V cutoff thresholds. The internal DC-DC converter dynamically selects buck or boost topology based on input voltage, ensuring continuous operation across the 0.9–3.6 V range without external regulators.

Does DA14585-00000AT2 support Bluetooth 5.0 features like Data Packet Length Extension and Mesh?

Yes, DA14585-00000AT2 is Bluetooth 5.0 MAC Ready and supports Data Packet Length Extension, Link Layer Privacy v1.2, Secure Connections, and Bluetooth low energy Mesh. These features are implemented in ROM-based protocol stack and require no external firmware updates. The SoC's 96 kB SRAM provides sufficient memory headroom to run enhanced advertising and mesh forwarding tasks concurrently with application code.

How many GPIOs are available on the DA14585-00000AT2 QFN40 package?

The DA14585-00000AT2 in QFN40 package provides 25 general-purpose I/Os, all configurable via programmable GPIO matrix. Each pin supports multiple functions including UART, SPI+, I²C, PDM, PCM, QDEC, ADC, and wake-up triggers. Pin assignment is software-defined, allowing flexible board layout and reuse of I/O resources across different firmware configurations without hardware changes.

Is an external crystal required for DA14585-00000AT2 operation?

DA14585-00000AT2 requires both a 16 MHz crystal (±20 ppm max) for RF and system timing and a 32 kHz crystal (±50 ppm) for low-power sleep clock. While RC oscillators (RC16KHz, RC32KHz, RCX) are available for non-critical timing, BLE compliance mandates crystal-based timing for advertising interval accuracy and packet timing stability per Bluetooth SIG requirements.

What audio interfaces does DA14585-00000AT2 support for MEMS microphone integration?

DA14585-00000AT2 integrates a dedicated Audio Unit with PDM interface supporting up to two MEMS microphones, PCM/I²S controller (up to 192 kHz), and 24-bit Sample Rate Converter (SRC). PDM and PCM signals can be routed to any GPIO via programmable pin logic, and DMA handles all data transfers to SRAM - freeing the ARM Cortex-M0™ core for application processing while maintaining low-latency audio capture.