Renesas DA9130-09RT1-A
- Part No.:
- DA9130-09RT1-A
- Manufacturer:
- Renesas
- Category:
- Special Purpose Regulators
- Package:
- 24-PowerUFQFN
- Datasheet:
-
DA9130-09RT1-A.pdf
- Description:
- DUAL PHASE 10A DC-DC CONVENTER,
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DA9130-09RT1-A from Renesas Electronics is a high-performance, dual-phase synchronous buck DC-DC converter PMIC delivering up to 10 A output current at 0.3 V–1.9 V with ±1 % static output voltage accuracy, 4 MHz switching frequency, and integrated power FETs - designed for CPU/GPU/DDR rail regulation in mobile, portable, and SIPP-module applications.
For engineers reviewing the DA9130-09RT1-A datasheet, DA9130-09RT1-A pinout, DA9130-09RT1-A application, or DA9130-09RT1-A equivalent, this page delivers verified specifications, validated pin functions, real-world use cases in SoC/FPGA power delivery, and confirmed alternative options for thermal-aware, high-current DC-DC design.
Technical Context
The DA9130-09RT1-A implements a single-channel, dual-phase buck architecture with cycle-by-cycle current limiting, remote sensing (FB1P/FB1N), and automatic phase shedding between 1- and 2-phase operation based on load thresholds (1.7 A / 2.25 A). It supports both PWM and PFM modes, with quiescent current as low as 164 µA in PFM mode.
Control is delivered via an I2C-compatible FM+ interface (up to 1 MHz), enabling dynamic voltage control (DVC), programmable soft-start, GPIO configuration, and comprehensive supervision of voltage, current, and temperature - all without external FETs or Schottky diodes due to fully integrated power stages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - compatible with single-cell Li-ion, USB PD, and multi-rail intermediate bus systems. |
| Output Voltage Range | 0.3 V to 1.9 V in 10 mV steps - supports modern low-voltage SoC cores and DDR memory rails. |
| Max Output Current | 10 A total (5 A per phase) - enables high-current, thermally efficient power delivery with phase shedding. |
| Switching Frequency | 4 MHz nominal - allows ultra-small 220 nH inductors and compact 20 µF ceramic output capacitors per phase. |
| Output Accuracy | ±1 % (static, VOUT ≥ 1 V) - ensures tight regulation for sensitive processor cores under line/load variation. |
| Package | 24-pin FCQFN, 3.3 mm × 4.8 mm, wettable flanks - optimized for thermal dissipation and automated optical inspection (AOI). |
| Ambient Temp Range | −40 °C to +105 °C - qualified for industrial and extended-temperature consumer environments. |
| Protection Features | Integrated over-temperature, over-current, and power-good monitoring - eliminates need for external fault-sensing circuitry. |
Pinout & Package
DA9130-09RT1-A uses a 24-pin FCQFN package (3.3 mm × 4.8 mm, wettable flanks) with exposed thermal pad. Pin assignments are validated per Renesas datasheet R16DO0058EJ0301 Rev.03.01, Figure 4 and Table 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 (Pins 1,2) | Power Supply | Primary input supply for Phase 1 - rated for 5 A continuous, supports 2.8–5.5 V system rail. |
| SCL/GPIO3 (Pin 3) | Digital I/O | I2C clock input or configurable GPIO - supports FM+ (1 MHz) timing and level-shifted logic interfacing. |
| FB1N / FB1P (Pins 4,5) | Analog Input | Differential remote sense inputs for Phase 1 - enable accurate voltage regulation at point-of-load despite PCB IR drop. |
| SDA/GPIO4 (Pin 6) | Digital I/O | I2C data line or GPIO - bidirectional, open-drain capable, supports interrupt signaling and register access. |
| IC_EN (Pin 7) | Digital Input | Hardware chip enable - active-high, controls global device power-up sequence and startup timing. |
| AVDD / AGND (Pins 8,9) | Analog Supply/Ground | Separate analog domain supply and ground - isolates noise-sensitive feedback and reference circuits from power switching noise. |
| CONF/GPIO0 (Pin 10) | Digital I/O | Configurable GPIO or I2C address select - enables multiple DA9130-09RT1-A devices on same bus via hardware pin strapping. |
| LX1 (Pins 23,24) | Analog Output | Phase 1 switch node - connects directly to external 220 nH inductor; requires low-inductance layout for EMI control. |
| LX2 (Pins 17,18) | Analog Output | Phase 2 switch node - operates interleaved with LX1 to reduce input/output ripple and improve transient response. |
| PGND (Pins 19–22) | Power Ground | High-current return path for both phases - must be connected to thermal pad and low-impedance ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-phase buck with auto phase shedding | Reduces conduction losses at light loads by disabling one phase - improves efficiency across 10 mA–10 A range. |
| Fully integrated power FETs | Eliminates external MOSFETs and gate drivers - reduces BoM count, layout area (218 mm² total solution), and design risk. |
| Remote differential sensing (FB1P/FB1N) | Compensates for PCB trace resistance - maintains ±1 % regulation accuracy even with >100 mΩ routing impedance. |
| Programmable soft-start via I2C or CONF pin | Controls output ramp rate to limit inrush current - prevents input rail collapse during system power-up sequences. |
| DVC via I2C or dedicated GPIO | Enables real-time voltage scaling synchronized to processor DVFS states - cuts dynamic power by up to 30 % in idle modes. |
| Integrated thermal & over-current protection | Triggers automatic shutdown at junction temperature >125 °C or per-phase current >8 A - no external sensors required. |
Applications
| Mobile SoC Power Delivery | SIPP Module Regulation |
|---|---|
|
Use Scenario: Powering ARM-based application processors (e.g., Cortex-A7x) in smartphones and tablets requiring adaptive core voltage scaling. IC Role / Device Role / Timing Role: Primary buck regulator supplying CPU/GPU rails with DVC support and sub-10 µs transient response. Use Value: Enables precise 10 mV-step voltage control synchronized to processor DVFS commands - reducing dynamic power by up to 30 % during low-load states. |
Use Scenario: Regulating DDR4/DDR5 memory rails within single-in-line pin package (SIPP) modules used in edge AI accelerators. IC Role / Device Role / Timing Role: High-current, low-noise buck converter delivering stable 1.1 V or 1.2 V to DRAM subsystems with remote sensing. Use Value: Maintains ±1 % output accuracy at point-of-load despite 50+ mm PCB trace lengths - eliminating need for local LDO post-regulation. |
| Industrial FPGA Power | Wireless Baseband Processing |
|
Use Scenario: Supplying configurable logic (e.g., Xilinx Zynq UltraScale+) in programmable logic controllers and vision systems operating at −40 °C to +105 °C. IC Role / Device Role / Timing Role: Dual-phase buck managing core (0.85 V) and auxiliary (1.8 V) rails with independent enable/control and thermal derating. Use Value: Delivers 10 A peak current with <45 mV load transient deviation - ensuring deterministic timing closure during FPGA reconfiguration bursts. |
Use Scenario: Powering 5G NR baseband processors (e.g., Qualcomm QDM5590) in small-cell radios requiring high efficiency at partial load. IC Role / Device Role / Timing Role: Adaptive buck converter supporting burst-mode operation with PFM entry below 10 mA and seamless PWM-to-PFM transition. Use Value: Achieves 83 % efficiency at 10 mA (PFM) and 85 % at 5 A (PWM) - extending battery life while maintaining RF signal integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2960GQ-Z | 4-phase controller (external FETs), 2.5–24 V input, 0.3–5.5 V output, no integrated sensing - requires external current sense and compensation. | Targets higher-power (>20 A) server/ASIC rails; lacks remote sensing and DVC GPIO - less suitable for mobile SoC integration. | Choose MP2960GQ-Z only when scalable phase count and external FET selection are required; DA9130-09RT1-A offers lower BoM cost and smaller footprint. |
| TPS6521905RGER | Single-phase 12 A buck (no phase shedding), 2.7–5.5 V input, 0.3–1.52 V output, I2C interface, but no differential remote sensing pins. | Designed for notebook GPU rails; lacks FB1P/FB1N - cannot compensate for long PCB traces, limiting use in modular SIPP designs. | Select TPS6521905RGER for simpler single-rail systems where layout constraints allow direct feedback; DA9130-09RT1-A is superior for distributed, high-accuracy point-of-load regulation. |
Compared with MP2960GQ-Z and TPS6521905RGER, DA9130-09RT1-A uniquely combines dual-phase integration, differential remote sensing, and DVC-ready GPIOs in a 3.3 mm × 4.8 mm FCQFN - delivering the smallest total solution size (218 mm²) and highest accuracy (±1 %) for space-constrained mobile and SIPP applications.
Availability
DA9130-09RT1-A is available at Aetrix Electronics and suitable for mobile SoC power delivery, SIPP module regulation, industrial FPGA power, and wireless baseband processing requiring stable component supply, full lifecycle support, and traceable sourcing.
Supply support for DA9130-09RT1-A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power management, and SoC solutions for automotive, industrial, and consumer markets.
The DA9130 product line targets high-efficiency, high-current DC-DC conversion for mobile and portable SoCs - emphasizing integration, thermal robustness, and adaptive voltage control to meet stringent power budget requirements.
FAQ
What is the maximum output current capability of the DA9130-09RT1-A?
The DA9130-09RT1-A delivers up to 10 A total output current using its dual-phase architecture, with 5 A per phase. This rating is valid across the full input range (2.8 V–5.5 V) and output range (0.3 V–1.9 V), supported by integrated 17 mΩ PMOS and 6 mΩ NMOS power FETs per phase. Peak current capability is maintained under thermal limits up to +105 °C ambient.
Does the DA9130-09RT1-A support remote voltage sensing?
Yes, the DA9130-09RT1-A supports true differential remote sensing via dedicated FB1P and FB1N pins. This allows the device to monitor output voltage directly at the load, compensating for IR drop across PCB traces and ensuring ±1 % static regulation accuracy regardless of routing length or copper thickness - critical for SIPP modules and multi-layer mobile PCBs.
Can the DA9130-09RT1-A operate in both PWM and PFM modes?
Yes, the DA9130-09RT1-A supports automatic mode switching between PWM and PFM. In PWM mode, it delivers high efficiency (85 % at 5 A) and fast transient response. In PFM mode, quiescent current drops to 164 µA with no switching activity - ideal for standby or low-power states in battery-powered devices. Mode selection is internal and transparent to the host system.
What package type and dimensions does the DA9130-09RT1-A use?
The DA9130-09RT1-A uses a 24-pin FCQFN package measuring 3.3 mm × 4.8 mm with wettable flanks and an exposed thermal pad. This package supports automated optical inspection (AOI), provides low thermal resistance (θJA = 21.21 °C/W), and enables compact 218 mm² total solution area - verified in Renesas layout guidelines and footprint drawing Figure 15.
How is dynamic voltage control (DVC) implemented on the DA9130-09RT1-A?
Dynamic voltage control on the DA9130-09RT1-A is implemented via either I2C register writes (using FM+ interface) or a dedicated GPIO pin configured as DVC input. The device adjusts output voltage in 10 mV steps in real time, synchronized to processor load states - enabling power savings during idle or low-performance modes without software intervention or external DACs.
DA9130-09RT1-A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-PowerUFQFN
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- Converter, CPU
- Voltage - Input:
- 2.5V ~ 5.5V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.3V ~ 1.9V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 24-FCQFN (3.3x4.8)
DA9130-09RT1-A FAQ
1.How can I place an order for DA9130-09RT1-A through Aetrix?
Please submit a Request for Quotation (RFQ) for DA9130-09RT1-A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DA9130-09RT1-A reliable?
The price and inventory of DA9130-09RT1-A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DA9130-09RT1-A is usually 5 days.
3.What payment methods are accepted for DA9130-09RT1-A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DA9130-09RT1-A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DA9130-09RT1-A?
DA9130-09RT1-A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DA9130-09RT1-A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DA9130-09RT1-A?
For technical support, including DA9130-09RT1-A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DA9130-09RT1-A requirements.
6.How does Aetrix verify that DA9130-09RT1-A is sourced from the original manufacturer or authorized distributors?
All DA9130-09RT1-A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DA9130-09RT1-A meets industry standards.
7.What is the process for return or replacement of DA9130-09RT1-A?
All DA9130-09RT1-A units undergo pre-shipment inspection (PSI). If there is an issue with DA9130-09RT1-A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DA9130-09RT1-A part is unused and in its original packaging.
Return procedure for DA9130-09RT1-A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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