Renesas DA9130-XXRT2
- Part No.:
- DA9130-XXRT2
- Manufacturer:
- Renesas
- Package:
- 24-PowerUFQFN
- Datasheet:
-
DA9130-XXRT2.pdf
- Description:
- IC REG BUCK ADJ 10A 24FCQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,070
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Product details
Overview
DA9130-XXRT2 from Renesas Electronics is a high-performance, dual-phase synchronous buck DC-DC converter PMIC designed to supply CPU/GPU/DDR rails in mobile and portable SoC systems. It delivers up to 10 A output current across a 0.3 V–1.9 V programmable output range, operates from 2.8 V–5.5 V input, and integrates fully pass devices in a 24-pin FCQFN (3.3 mm × 4.8 mm) package with wettable flanks.
For engineers reviewing the DA9130-XXRT2 datasheet, DA9130-XXRT2 pinout, DA9130-XXRT2 application, or DA9130-XXRT2 equivalent, this page provides verified technical context, real-world design meaning for key specs, validated pin functions, confirmed automotive-grade alternatives, and supply-ready availability details - all grounded in Renesas R16DO0058EJ0301 Rev.03.01.
Technical Context
The DA9130-XXRT2 implements a single-output, dual-phase interleaved buck architecture with cycle-by-cycle current limiting and automatic phase shedding (1-phase ↔ 2-phase transition at 1.7 A / 2.25 A thresholds). Its 4 MHz switching frequency enables compact 220 nH inductors per phase and supports remote sensing via dedicated FB1P/FB1N and FB2P/FB2N differential inputs for ±1 % static voltage accuracy.
Control is delivered via I²C-compatible FM+ interface (up to 1 MHz), with configurable GPIOs (CONF/GPIO0, GPIO1, GPIO2, SCL/GPIO3, SDA/GPIO4) enabling dynamic voltage control (DVC), power-good signaling, interrupt handling (nIRQ), and multi-device address selection. Integrated thermal shutdown and over-current protection operate without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - supports single-cell Li-ion, USB PD, and wide-input portable power rails without pre-regulation. |
| Output Voltage Range | 0.3 V to 1.9 V in 10 mV steps - matches modern low-voltage SoC core and memory rail requirements. |
| Max Output Current | 10 A total (5 A per phase) - sustains peak CPU/GPU loads while enabling phase shedding for light-load efficiency. |
| Switching Frequency | 4 MHz nominal - allows use of ultra-small 220 nH inductors and reduces output capacitor count (20 µF total). |
| Voltage Accuracy | ±1 % (static, VOUT ≥ 1 V) - ensures stable operation of sub-1 V logic domains under line/load variation. |
| Protection Features | Integrated OCP, OTP, and power-good monitoring - eliminates need for external fault-sensing circuitry. |
| Interface | I²C-compatible FM+ (1 MHz max) - enables real-time DVC, telemetry readback, and multi-rail coordination. |
Pinout & Package
DA9130-XXRT2 is housed in a 24-pin FCQFN package (3.3 mm × 4.8 mm, 0.4 mm pitch) with wettable flanks for automated optical inspection (AOI) and enhanced solder joint reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1, PVDD2 (Pins 1–2, 15–16) | Power supply input | Dual high-current input rails (5 A each) for independent phase power delivery and thermal distribution. |
| LX1, LX2 (Pins 23–24, 17–18) | Switch node outputs | Interleaved buck switch nodes - enable phase cancellation of input/output ripple and reduce EMI filtering burden. |
| FB1P/FB1N, FB2P/FB2N (Pins 4–5, 12–13) | Differential feedback inputs | Remote-sense capability compensates for PCB IR drop, maintaining ±1 % regulation at load point. |
| SCL/GPIO3, SDA/GPIO4 (Pins 3, 6) | Configurable digital I/O | Default I²C interface pins; reconfigurable as GPIOs for DVC control, status indication, or address selection. |
| CONF/GPIO0 (Pin 10) | Configuration input | Hardware-selectable I²C slave address (two options) - enables stacking multiple DA9130-XXRT2 on same bus. |
| IC_EN (Pin 7) | Chip enable input | Active-high enable signal - controls global device power-up sequence and synchronizes with system power sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-phase interleaving | Reduces input/output ripple by >50 % vs. single-phase, lowering required bulk capacitance and EMI filter size. |
| Fully integrated FETs | Eliminates external high-side/low-side MOSFETs and Schottky diodes - cuts BoM count and layout area by ~30 %. |
| Programmable soft-start | Configurable ramp time prevents input inrush and avoids brown-out during system power-up sequences. |
| Dynamic voltage control (DVC) | Enables real-time VOUT adjustment via I²C or GPIO to match CPU/GPU DVFS states - saves >15 % active power. |
| Wettable flank QFN | Enables AOI-compatible solder joint inspection - critical for high-reliability mobile and automotive assembly lines. |
Applications
| Mobile SoC Power Delivery | DDR Memory Rail Supply |
|---|---|
|
Use Scenario: Powering ARM-based application processors (e.g., Cortex-A78/A715) in smartphones and tablets requiring adaptive core voltage scaling. IC Role / Device Role / Timing Role: Primary core rail regulator with DVC support and 4 MHz switching for minimal transient response latency. Use Value: Achieves <15 mV line transient deviation and ±1 % static accuracy - meets JEDEC JESD84-B51 DDR4/LPDDR5 timing margin requirements. |
Use Scenario: Delivering stable 1.1 V or 1.8 V to LPDDR5 memory subsystems in portable computing devices. IC Role / Device Role / Timing Role: High-current, low-noise buck converter with remote sensing to maintain voltage at memory die under fast load steps. Use Value: 2.25 A phase-shedding threshold and 45 mV load transient response ensure DDR timing stability during burst access. |
| SIPP Module Integration | Industrial Edge AI Processor |
|
Use Scenario: Embedded power solution inside single-in-line pin package (SIPP) modules housing SoC + DRAM + PMIC in compact form factor. IC Role / Device Role / Timing Role: Integrated dual-phase regulator replacing discrete controller+FET solutions - reduces module footprint by 218 mm². Use Value: Wettable flank FCQFN package enables reliable reflow in high-density SIPP assembly with no voiding risk. |
Use Scenario: Powering heterogeneous AI accelerators (e.g., NPU + DSP clusters) in fanless industrial gateways operating at -40 °C to +105 °C. IC Role / Device Role / Timing Role: AEC-Q100 Grade 2 qualified (DA9130-A variant) power stage with thermal derating curves validated to 105 °C ambient. Use Value: Integrated OTP thermal warning and critical shutdown prevent thermal runaway during sustained 10 A compute loads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2965A from Monolithic Power Systems | 4-phase capable, 600 kHz–2 MHz programmable frequency, requires external FETs, no integrated remote sensing. | Targets higher-power server SoCs; lacks differential FB inputs and wettable flanks. | Choose when >10 A output or multi-rail coordination is needed; avoid if board space or remote sensing is critical. |
| TPS65988 from Texas Instruments | USB-C PD + dual-buck PMIC combo; buck sections rated 6 A each, 2.5 V–5.5 V input, no phase shedding. | Designed for USB-C powered docks/port replicators; not optimized for mobile SoC core rails. | Choose for USB-C host systems needing integrated PD controller; avoid for standalone high-efficiency core rail use. |
Compared with MP2965A and TPS65988, DA9130-XXRT2 uniquely combines 10 A dual-phase integration, 4 MHz switching, differential remote sensing, and wettable-flank packaging - making it optimal for space-constrained, thermally demanding mobile and SIPP applications where precision and manufacturability are prioritized over multi-rail flexibility.
Availability
DA9130-XXRT2 is available at Aetrix Electronics and suitable for mobile SoC power delivery, LPDDR5 memory rail regulation, SIPP module integration, and industrial edge AI processor applications requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant variants.
Supply support for DA9130-XXRT2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog power management, and embedded solutions for automotive, industrial, and consumer markets.
The DA9130-XXRT2 belongs to Renesas' DA91xx family of high-efficiency, fully integrated PMICs engineered specifically for battery-powered mobile and portable SoC platforms demanding ultra-compact power delivery with adaptive voltage control.
FAQ
What is the maximum output current capability of the DA9130-XXRT2?
The DA9130-XXRT2 delivers up to 10 A total output current in dual-phase operation, with 5 A per phase. This rating is sustained under recommended operating conditions (TA = –40 °C to +105 °C, VIN ≥ VOUT + 1 V), and supports short-duration peak loads beyond 10 A as specified in the datasheet's transient performance section. The DA9130-XXRT2 achieves this with integrated FETs and 4 MHz switching to minimize thermal stress.
Does the DA9130-XXRT2 support remote voltage sensing?
Yes, the DA9130-XXRT2 supports true differential remote sensing via dedicated FB1P/FB1N and FB2P/FB2N pins. This allows direct connection to the load point, compensating for PCB trace resistance and ensuring ±1 % static output voltage accuracy regardless of routing length or copper weight - a critical feature for sub-1 V SoC core rails where IR drop can exceed tolerance margins.
What package type and dimensions does the DA9130-XXRT2 use?
The DA9130-XXRT2 uses a 24-pin FCQFN package measuring 3.3 mm × 4.8 mm with 0.4 mm pitch and wettable flanks. This package enables automated optical inspection (AOI) of solder joints and improves thermal dissipation versus standard QFNs. Its compact size contributes to the device's total solution area of just 218 mm² - essential for thin mobile and wearable designs.
Can the DA9130-XXRT2 be used in automotive applications?
The DA9130-XXRT2 itself is a consumer-grade part, but its automotive-qualified variant DA9130-A is AEC-Q100 Grade 2 certified (–40 °C to +105 °C ambient, qualified per stress test conditions). While DA9130-XXRT2 shares identical electrical specs and pinout, only DA9130-A is approved for automotive use. For automotive designs, specify DA9130-A-XXRT2 and verify qualification documentation with Renesas before release.
How does dynamic voltage control (DVC) work on the DA9130-XXRT2?
Dynamic voltage control on the DA9130-XXRT2 adjusts the output voltage in real time based on processor load state. It supports two modes: register-based DVC via I²C-compatible FM+ interface (up to 1 MHz), or hardware-triggered DVC using a dedicated GPIO pin. This enables precise matching of supply voltage to CPU/GPU DVFS states - reducing dynamic power consumption by up to 15 % during low-activity periods without compromising performance when needed. The DA9130-XXRT2 implements this with internal DAC and loop compensation optimized for fast settling.
DA9130-XXRT2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-PowerUFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.3V
- Voltage - Output (Max):
- 1.9V
- Current - Output:
- 10A
- Frequency - Switching:
- 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 24-FCQFN (3.3x4.8)
DA9130-XXRT2 FAQ
1.How can I place an order for DA9130-XXRT2 through Aetrix?
Please submit a Request for Quotation (RFQ) for DA9130-XXRT2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DA9130-XXRT2 reliable?
The price and inventory of DA9130-XXRT2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DA9130-XXRT2 is usually 5 days.
3.What payment methods are accepted for DA9130-XXRT2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DA9130-XXRT2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DA9130-XXRT2?
DA9130-XXRT2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DA9130-XXRT2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DA9130-XXRT2?
For technical support, including DA9130-XXRT2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DA9130-XXRT2 requirements.
6.How does Aetrix verify that DA9130-XXRT2 is sourced from the original manufacturer or authorized distributors?
All DA9130-XXRT2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DA9130-XXRT2 meets industry standards.
7.What is the process for return or replacement of DA9130-XXRT2?
All DA9130-XXRT2 units undergo pre-shipment inspection (PSI). If there is an issue with DA9130-XXRT2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DA9130-XXRT2 part is unused and in its original packaging.
Return procedure for DA9130-XXRT2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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