Renesas DA9132-XXRT1
- Part No.:
- DA9132-XXRT1
- Manufacturer:
- Renesas
- Package:
- 24-PowerUFQFN
- Datasheet:
-
DA9132-XXRT1.pdf
- Description:
- IC REG BCK ADJ 3A/3A DL 24FCQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,688
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Product details
Overview
DA9132-XXRT1 from Renesas Electronics is a dual-channel, fully integrated buck DC-DC power management IC (PMIC) designed for CPU/GPU and DDR memory rail regulation in mobile, portable, and SIPP module applications. It delivers up to 3 A per channel across 0.3 V–1.9 V output voltage range from a 2.8 V–5.5 V input, operates at 4 MHz switching frequency, and features remote sensing for ±1 % static output accuracy.
For engineers reviewing the DA9132-XXRT1 datasheet, DA9132-XXRT1 pinout, DA9132-XXRT1 application, or DA9132-XXRT1 equivalent, key selection considerations include its dual-buck architecture with integrated FETs, I2C-compatible FM+ interface, programmable soft-start, dynamic voltage control (DVC), and 24-pin FCQFN wettable-flank package optimized for thermal performance and PCB routing flexibility.
Technical Context
The DA9132-XXRT1 implements two independent single-phase synchronous buck converters, each with fully integrated high-side and low-side MOSFETs, eliminating external FETs or Schottky diodes. Its 4 MHz nominal switching frequency enables compact 220 nH inductors and 20 µF output capacitors per channel while maintaining high efficiency across light-to-heavy loads.
Dynamic voltage control (DVC) is supported via either I2C register writes or dedicated GPIO pins, enabling real-time adaptive output adjustment based on processor load states. Remote sensing on both FB1P/FB1N and FB2P/FB2N pairs ensures ±1 % output voltage accuracy under varying PCB trace impedance and layout conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - supports single-cell Li-ion, USB PD, and fixed 3.3 V/5 V system rails without pre-regulation. |
| Output Voltage Range | 0.3 V to 1.9 V per channel - covers core logic, GPU, and DDR I/O supply requirements in modern SoCs. |
| Max Output Current | 3 A per channel - sufficient for high-performance CPU/GPU cores and DDR memory subsystems. |
| Switching Frequency | 4 MHz nominal - enables use of ultra-small 220 nH inductors and reduces solution footprint to 218 mm². |
| Output Accuracy | ±1 % static, ±5 % dynamic - ensures stable rail regulation during load transients typical in burst-mode processing. |
| Interface | I2C-compatible FM+ (1 MHz max) - allows configuration, monitoring, and DVC control with standard microcontroller peripherals. |
| Operating Temp | −40 °C to +105 °C ambient - qualified for industrial and extended-temperature consumer environments. |
Pinout & Package
DA9132-XXRT1 is housed in a 24-pin FCQFN package (3.3 mm × 4.8 mm, wettable flanks) with exposed thermal pad for enhanced heat dissipation in space-constrained mobile and portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 (Pins 1,2) | Power Supply Input | Primary input supply for Channel 1 buck converter; rated for 5 A continuous current. |
| SCL/GPIO3 (Pin 3) | Digital I/O | Configurable as I2C clock line or general-purpose input/output with 15 mA drive capability. |
| FB1N / FB1P (Pins 4,5) | Analog Feedback Inputs | Differential remote sense inputs for Channel 1; enable precise regulation despite PCB IR drop. |
| SDA/GPIO4 (Pin 6) | Digital I/O | Configurable as I2C data line or GPIO with 15 mA drive; supports bidirectional communication. |
| IC_EN (Pin 7) | Digital Input | Hardware enable signal; asserts full device operation when pulled high (active-high logic). |
| CONF/GPIO0 (Pin 10) | Digital I/O | Configurable GPIO or configuration pin; selects I2C slave address when used as CONF input. |
| LX1 (Pins 23,24) | Analog Output | Switch node output of Channel 1 buck; connects directly to external 220 nH inductor and output capacitor. |
| PGND (Pins 19–22) | Power Ground | Dedicated low-impedance ground return path for both buck channels; critical for EMI and thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| Fully integrated buck FETs | Eliminates need for external high-side/low-side MOSFETs or Schottky diodes, reducing BoM count and layout complexity. |
| Programmable soft-start | Configurable ramp time limits inrush current during power-up, preventing input rail collapse and ensuring controlled rail activation. |
| Dual-channel remote sensing | Independent FB1P/FB1N and FB2P/FB2N pairs maintain ±1 % output accuracy across varied PCB trace lengths and impedances. |
| Dynamic voltage control (DVC) | Enables real-time output voltage scaling via GPIO or I2C in response to processor load state, improving system-level power efficiency. |
| Integrated protection | Includes cycle-by-cycle over-current detection, thermal shutdown, and fault reporting via nIRQ pin-no external sensors required. |
Applications
| Mobile Application Processor Power | DDR Memory Rail Regulation |
|---|---|
Use Scenario: Powering ARM-based application processors (e.g., Cortex-A7x/A8x) in smartphones and tablets requiring tightly regulated core voltages. IC Role / Device Role / Timing Role: Dual-buck PMIC delivering independent, dynamically scaled VDD_CPU and VDD_GPU rails with remote sensing. Use Value: Enables adaptive voltage scaling (AVS) and meets ±1 % static accuracy requirements for sub-1 V core rails under fast load transients. |
Use Scenario: Supplying DDR3/DDR4/LPDDR4 memory interfaces where tight voltage tolerance and fast transient response are mandatory. IC Role / Device Role / Timing Role: Dedicated buck regulator for VDDQ or VDDIO rails with differential feedback and 4 MHz switching for minimal output capacitance. Use Value: Achieves ±5 % dynamic regulation during burst-mode memory access, reducing required bulk capacitance by >30 % vs. lower-frequency solutions. |
| SIPP Module Integration | Industrial Edge Computing Node |
Use Scenario: Embedded power delivery within Single In-Line Pin Package modules housing SoC + DRAM combinations for compact edge devices. IC Role / Device Role / Timing Role: Integrated dual-rail PMIC replacing discrete regulators to meet strict height and thermal constraints of SIPP form factor. Use Value: 218 mm² total solution area and 3.3 mm × 4.8 mm FCQFN package enable direct integration into SIPP substrate layouts without redesign. |
Use Scenario: Powering FPGA-based industrial controllers operating in −40 °C to +105 °C ambient environments with high reliability demands. IC Role / Device Role / Timing Role: Primary DC-DC regulator for FPGA core and I/O banks, featuring AEC-Q100 Grade 2 compatibility (via DA9132-A variant) and fault reporting. Use Value: Integrated over-temperature and over-current protection eliminates need for external monitoring circuitry, simplifying safety-critical BOM validation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel buck PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ4436-AEC1 | Single-channel 6 A buck; no integrated DVC or remote sensing; requires external compensation. | Targeted at automotive ADAS cameras-not optimized for multi-rail SoC power with dynamic scaling. | Choose when higher per-channel current is needed but dual-rail coordination and DVC are not required. |
| TPS6521905RGER | Dual-channel buck (3 A/3 A); 2.7–5.5 V input; no remote sensing; ±2 % output accuracy; I2C-only control. | Designed for TI Sitara AM6x processors-lacks GPIO-based DVC and wettable-flank packaging for automated optical inspection. | Prefer when using TI ecosystem tools and layout compatibility with existing TPS65219 designs is prioritized over remote sensing accuracy. |
Compared with MPQ4436-AEC1 and TPS6521905RGER, DA9132-XXRT1 uniquely combines dual-channel 3 A buck regulation, differential remote sensing, GPIO- and I2C-enabled DVC, and wettable-flank FCQFN packaging-enabling smaller footprint, tighter voltage accuracy, and simpler thermal management in SoC-centric designs.
Availability
DA9132-XXRT1 is available at Aetrix Electronics and suitable for mobile SoC power, DDR memory regulation, and SIPP module integration requiring stable component supply, long-term lifecycle support, and automotive-grade variants (DA9132-A).
Supply support for DA9132-XXRT1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power management, and SoC solutions for automotive, industrial, and enterprise markets.
The DA9132-XXRT1 belongs to Renesas' high-efficiency PMIC product line, engineered specifically for dynamic, multi-rail power delivery in battery-powered and thermally constrained mobile and portable systems.
FAQ
What is the maximum output current per channel for the DA9132-XXRT1?
The DA9132-XXRT1 delivers up to 3 A per channel continuously under recommended operating conditions (TA ≤ +105 °C, proper PCB thermal design). Each buck converter integrates fully rated power FETs and supports 220 nH inductors with 20 µF output capacitance to sustain this current while maintaining ±5 % dynamic regulation during load steps.
Does the DA9132-XXRT1 support dynamic voltage scaling (DVS) or dynamic voltage control (DVC)?
Yes, the DA9132-XXRT1 supports Dynamic Voltage Control (DVC) through either its I2C-compatible FM+ interface or dedicated GPIO pins (e.g., CONF/GPIO0 or GPIO1). This allows real-time adjustment of output voltage in response to processor load states-critical for power savings in CPU/GPU and DDR subsystems-and is explicitly documented in Sections 5.4 and 6.3 of the R16DS0578EJ0300 datasheet.
What package type and dimensions does the DA9132-XXRT1 use?
The DA9132-XXRT1 uses a 24-pin FCQFN package measuring 3.3 mm × 4.8 mm with wettable flanks, as specified in Figure 19 and Section 9.1 of the datasheet. The exposed thermal pad enhances thermal performance in high-power-density layouts, and the wettable flanks support automated optical inspection (AOI) during reflow soldering.
Is remote sensing supported on both buck channels of the DA9132-XXRT1?
Yes, the DA9132-XXRT1 provides independent differential remote sensing on both channels: FB1P/FB1N for Channel 1 and FB2P/FB2N for Channel 2. This architecture maintains ±1 % static output voltage accuracy regardless of PCB trace resistance between the IC and load, as confirmed in Section 3.6 and Figure 1 of the datasheet.
What protection features are integrated into the DA9132-XXRT1?
The DA9132-XXRT1 integrates cycle-by-cycle over-current protection, thermal shutdown (triggering at TJ ≥ 150 °C), and fault reporting via the nIRQ pin. No external sensing components are required-the protection logic is implemented entirely within the IC and validated per AEC-Q100 Grade 2 for automotive variants (DA9132-A), as detailed in Sections 3.5, 5.1.5, and 5.1.7 of the datasheet.
DA9132-XXRT1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 24-PowerUFQFN
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.3V
- Voltage - Output (Max):
- 1.9V
- Current - Output:
- 3A, 3A
- Frequency - Switching:
- 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 24-FCQFN (3.3x4.8)
DA9132-XXRT1 FAQ
1.How can I place an order for DA9132-XXRT1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DA9132-XXRT1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DA9132-XXRT1 reliable?
The price and inventory of DA9132-XXRT1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DA9132-XXRT1 is usually 5 days.
3.What payment methods are accepted for DA9132-XXRT1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DA9132-XXRT1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DA9132-XXRT1?
DA9132-XXRT1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DA9132-XXRT1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DA9132-XXRT1?
For technical support, including DA9132-XXRT1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DA9132-XXRT1 requirements.
6.How does Aetrix verify that DA9132-XXRT1 is sourced from the original manufacturer or authorized distributors?
All DA9132-XXRT1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DA9132-XXRT1 meets industry standards.
7.What is the process for return or replacement of DA9132-XXRT1?
All DA9132-XXRT1 units undergo pre-shipment inspection (PSI). If there is an issue with DA9132-XXRT1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DA9132-XXRT1 part is unused and in its original packaging.
Return procedure for DA9132-XXRT1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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