Analog Devices Inc. DC1067A-A

Overview

DC1067A-A from Analog Devices (formerly Linear Technology) is a demonstration board for the LTC2450 - an ultra-tiny, 16-bit delta-sigma ADC with single-ended rail-to-rail input (0 V to VCC), SPI interface, internal oscillator, and 33.3 ms conversion time. It operates from 2.7 V to 5.5 V, draws 350 µA during conversion and <200 nA in sleep mode, and targets precision low-power sensing applications such as environmental monitoring and embedded data acquisition.

For engineers reviewing the DC1067A-A datasheet, DC1067A-A pinout, DC1067A-A application, or DC1067A-A equivalent, this page delivers verified functional context, real-world timing behavior, supply current trade-offs across sample rates, SPI interface timing constraints (including CPOL-0/1 compatibility), and design-critical layout guidance for preserving 2 LSB INL and 0.02 LSB RMS noise performance.

Technical Context

The DC1067A-A implements the LTC2450's full 3-wire SPI interface (CS, SCK, SDO) with on-board bypassing (10 µF + 0.1 µF at VCC/GND), selectable reference configuration (VCC-referenced), and direct connection to VIN via test points and screw terminals. It supports both idle-high (CPOL = 1) and idle-low (CPOL = 0) clock modes, enabling status monitoring (SDO = HIGH during CONVERT, LOW in SLEEP) without external logic.

This board validates the LTC2450's single-cycle settling for multiplexed inputs, continuous internal offset/full-scale calibration, and proprietary low-input-sampling-current architecture (50 nA avg), allowing direct RC filtering (e.g., 1 kΩ + 0.1 µF) with <1 LSB error - critical for high-impedance sensor interfacing in battery-powered systems.

Key Specifications

Availability

DC1067A-A is available at Aetrix Electronics and suitable for precision sensor interface validation, battery-powered environmental monitoring, and embedded ADC upgrade projects requiring stable component supply, traceable sourcing, and long-term lifecycle support.

Supply support for DC1067A-A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies.

The DC1067A-A belongs to ADI's Linear Technology legacy demonstration board family, designed specifically to accelerate evaluation and system integration of ultra-low-power, high-accuracy delta-sigma ADCs like the LTC2450 in space-constrained, energy-sensitive applications.

FAQ

What is the primary function of the DC1067A-A?

The DC1067A-A is a fully assembled and tested demonstration board for the LTC2450 16-bit delta-sigma ADC. It provides immediate hardware validation of the LTC2450's key features - including its 3-wire SPI interface, internal oscillator, rail-to-rail input, and ultra-low sleep current - without requiring custom PCB design. Engineers use DC1067A-A to verify timing behavior, power consumption, noise performance, and interface compatibility before integrating the LTC2450 into end equipment.

Does the DC1067A-A require external components to operate the LTC2450?

No. The DC1067A-A includes all required passive components for proper LTC2450 operation: dual-stage VCC bypassing (10 µF tantalum + 0.1 µF ceramic), GND plane connectivity, and direct VIN access via screw terminals and test points. The LTC2450 on DC1067A-A uses its internal oscillator - no external crystal, resonator, or timing components are needed. This matches the "easy-to-use, ultra-tiny" design intent documented in the LTC2450 datasheet.

Can the DC1067A-A support both CPOL = 0 and CPOL = 1 SPI configurations?

Yes. The DC1067A-A supports both serial clock idle states as specified for the LTC2450. Its unmodified hardware allows direct connection to microcontrollers using either CPOL = 0 (SCK idle low) or CPOL = 1 (SCK idle high), with corresponding CS/SCK timing sequences for data readout, status monitoring (SDO HIGH = conversion in progress), and new conversion triggering. No jumpers or modifications are required to switch between modes.

How does the DC1067A-A help achieve the LTC2450's 0.02 LSB RMS noise specification?

The DC1067A-A implements critical layout practices that preserve LTC2450 accuracy: low-inductance VCC/GND decoupling placed adjacent to the IC, dedicated ground plane connection for the exposed pad (Pin 7), minimized VIN trace length, and separation of analog and digital return paths. These features directly enable the 0.02 LSB RMS noise and 2 LSB INL performance stated in the LTC2450 datasheet - provided external signals are properly filtered and digital edges are controlled per application note guidelines.

Is the DC1067A-A compatible with 2-wire SPI operation?

Yes - the DC1067A-A supports 2-wire mode by hardwiring CS to GND, as described in the LTC2450 datasheet. In this configuration, the board operates with only SCK and SDO lines, eliminating the need for a dedicated chip select signal. However, 2-wire mode disables sleep-state entry and serial transfer abort capability; users must rely on precise external timing to determine conversion completion and avoid missing data bits.