Analog Devices Inc. DC1369A-B

Overview

DC1369A-B from Analog Devices (formerly Linear Technology) is a demonstration board for the LTC2261-14, a 14-bit, 125Msps ultralow-power ADC with 73.4dB SNR, 85dB SFDR, and 0.17psRMS jitter. It features CMOS/DDR-CMOS/DDR-LVDS outputs, 1.8V single-supply operation, and 800MHz full-power bandwidth - enabling high-fidelity digitization of IF signals in SDR and base station receivers.

For engineers reviewing the DC1369A-B datasheet, DC1369A-B pinout, DC1369A-B application, or DC1369A-B equivalent, this page provides verified hardware configuration details, supported ADC modes (LTC2261-14 only), interface compatibility with FPGA/ASIC digital capture systems, and design guidance for undersampling RF/IF inputs up to 140MHz.

Technical Context

The DC1369A-B implements the LTC2261-14 in full-rate CMOS and DDR-CMOS output configurations, with on-board differential analog input conditioning, clock distribution circuitry supporting sine wave, LVDS, or PECL encode inputs, and configurable reference selection (internal ±1V or ±0.5V via SENSE pin). It supports SPI-based register programming for mode control including randomizer, duty cycle stabilizer, nap/sleep modes.

Board-level signal integrity is maintained via controlled-impedance routing, dedicated analog/digital ground planes, and optimized decoupling: 0.1µF ceramic caps on VDD (Pins 9/10/40), OVDD (Pin 26), VCM (Pin 37), and VREF (Pin 38); 2.2µF + 0.1µF on REFH/REFL (Pins 4–7); and 1µF on VREF. The exposed pad (Pin 41) is soldered to PCB ground per UJ package requirements.

Key Specifications

Availability

DC1369A-B is available at Aetrix Electronics and suitable for cellular base stations, software-defined radios, and portable medical imaging systems requiring stable component supply and rapid evaluation-to-production transition.

Supply support for DC1369A-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, acquired Linear Technology in 2017 to strengthen its precision data conversion portfolio.

The DC1369A-B belongs to ADI's high-speed ADC evaluation platform family, designed specifically to accelerate prototyping and validation of wideband digitization in communications infrastructure, test equipment, and advanced imaging systems.

FAQ

What is the primary function of the DC1369A-B evaluation board?

The DC1369A-B evaluation board is a fully assembled and tested hardware platform for evaluating the LTC2261-14 14-bit, 125Msps analog-to-digital converter. It provides all necessary power regulation, clock conditioning, analog input interface, and digital output routing to enable immediate functional validation and performance characterization of the DC1369A-B's target ADC under real-world signal conditions.

Which ADC variants are supported by the DC1369A-B?

The DC1369A-B is specifically configured for the LTC2261-14 (125Msps) and does not support the LTC2260-14 (105Msps) or LTC2259-14 (80Msps) without hardware modification. Pin-compatible packaging allows mechanical fit, but timing, power, and register settings are optimized exclusively for the LTC2261-14 as shipped.

Does the DC1369A-B support DDR-LVDS output mode?

Yes, the DC1369A-B supports DDR-LVDS output mode for the LTC2261-14. This is enabled by setting SCK high and PAR/SER high, configuring the on-board termination and level-shifting circuitry to deliver compliant 3.5mA or 1.75mA LVDS current into 100Ω differential loads with VOS = 1.125V–1.375V.

How is clock jitter performance validated on the DC1369A-B?

DC1369A-B enables jitter validation through its low-noise clock distribution path: differential ENC+/ENC– inputs accept LVDS, PECL, or sine wave clocks; optional duty cycle stabilizer (enabled via CS) reduces encode timing uncertainty; and measured 0.17psRMS jitter is confirmed using spectrum analysis of FFT spurs under 70MHz/140MHz input tones per the LTC2261-14 datasheet test conditions.

Can the DC1369A-B be used with external reference sources?

Yes, the DC1369A-B supports external reference sources applied to the SENSE pin (Pin 39) within 0.625V–1.3V. When an external voltage is supplied, the LTC2261-14 automatically disables its internal 1.25V reference and scales full-scale input range accordingly - verified via SNR and SFDR measurements across multiple input frequencies on the DC1369A-B.