Analog Devices Inc. DC1369A-C

Overview

DC1369A-C from Analog Devices (formerly Linear Technology) is a fully assembled, tested evaluation board for the LTC2261-14 14-bit, 125Msps analog-to-digital converter. It features ultralow jitter (0.17psRMS), 73.4dB SNR, and 85dB SFDR, with support for CMOS, DDR CMOS, and DDR LVDS output modes. The board enables high-fidelity digitization of IF signals up to 140MHz in software-defined radio and portable medical imaging systems.

For engineers reviewing the DC1369A-C datasheet, DC1369A-C pinout, DC1369A-C application, or DC1369A-C equivalent, this page delivers verified hardware configuration details, signal integrity validation data, SPI register control guidance, clock interface requirements, and layout-critical decoupling practices specific to high-speed ADC evaluation.

Technical Context

The DC1369A-C implements the LTC2261-14 in its highest-speed variant (125Msps), with full support for differential analog input (1–2VP-P range), internal/external reference selection via SENSE pin, and programmable clock duty cycle stabilization. Its analog front-end includes matched 50Ω AC-coupled inputs and precision 2.2µF + 0.1µF REFH/REFL bypassing per Linear's recommended layout.

Digital interface options are configured via PAR/SER, SCK, and CS pins: serial SPI mode enables full register control (including randomizer, nap/shutdown, output format), while parallel mode provides simplified logic-level control of output mode and clock stabilizer. The board routes all 14 data bits, OF, CLKOUT±, and ENC± with controlled impedance and length matching for DDR LVDS compliance.

Key Specifications

Availability

DC1369A-C is available at Aetrix Electronics and suitable for software-defined radio development, portable ultrasound front-ends, and multi-channel data acquisition systems requiring stable component supply and validated high-speed ADC evaluation infrastructure.

Supply support for DC1369A-C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The DC1369A-C belongs to Analog Devices' LTC evaluation board family, designed specifically to accelerate prototyping and performance validation of high-speed, low-power ADCs in demanding RF and instrumentation applications.

FAQ

What is the primary function of the DC1369A-C evaluation board?

The DC1369A-C evaluation board is a ready-to-use hardware platform for evaluating the LTC2261-14 14-bit, 125Msps analog-to-digital converter. It provides all necessary power regulation, clock conditioning, analog input conditioning, and digital output routing to validate dynamic performance (SNR, SFDR, jitter), interface compatibility, and register-level configuration-without requiring custom PCB design. DC1369A-C enables rapid characterization of the LTC2261-14 under real-world signal conditions.

Does the DC1369A-C support DDR LVDS output mode for the LTC2261-14?

Yes, the DC1369A-C fully supports DDR LVDS output mode for the LTC2261-14, including on-board 100Ω differential termination, matched trace lengths for D0_1± through D12_13± and OF±, and configurable 1.75mA or 3.5mA output current via jumper settings. The board's layout adheres to LVDS signal integrity requirements, enabling clean 250Mbps DDR data transmission directly to FPGA or ASIC receivers without additional level-shifting or termination.

How is the analog input range configured on the DC1369A-C?

The DC1369A-C configures the LTC2261-14 analog input range (1VP-P or 2VP-P) via the SENSE pin, which is accessible via onboard test points and jumpers. Connecting SENSE to VDD selects ±1V range (2VP-P differential), while grounding SENSE selects ±0.5V range (1VP-P differential). The board also supports external reference injection via the SENSE pin, enabling precise scaling for specialized sensor interfaces or calibrated measurement systems using the DC1369A-C.

Can the DC1369A-C be used to evaluate power consumption in Nap and Sleep modes?

Yes, the DC1369A-C allows direct measurement of LTC2261-14 power states: Nap mode draws 9mW and Sleep mode draws 0.5mW, both verified on the board using onboard current sense resistors and test points. These low-power states are activated via SPI register writes or parallel-mode SDI logic control, and the DC1369A-C provides unobstructed access to VDD and OVDD supply rails for accurate quiescent current validation across temperature and sample rate conditions.

What clock sources are compatible with the DC1369A-C for driving the LTC2261-14 ENC+ and ENC– inputs?

The DC1369A-C accepts differential clock inputs (LVDS, LVPECL, or sine wave) directly into the ENC+ and ENC– pins via SMA connectors, with onboard AC coupling and biasing optimized for 1.8V operation. It also supports single-ended TTL/CMOS clocks applied to ENC+, with ENC– grounded. The board includes a clock duty cycle stabilizer enabled by CS logic, allowing robust operation even with non-50% duty cycle clocks-critical for maintaining DC1369A-C performance when using synthesizers or FPGA-generated clocks.