Analog Devices Inc. DC1369A-K
- Part No.:
- DC1369A-K
- Manufacturer:
- Analog Devices Inc.
- Package:
- Datasheet:
-
DC1369A-K.pdf
- Description:
- BOARD EVAL LTC2257-12
- Quantity:
- Payment:

- Shipping:

Inventory:2,336
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DC1369A-K from Analog Devices (formerly Linear Technology) is a demonstration board for the LTC2258-12, a 12-bit, 65Msps ultralow-power analog-to-digital converter. It features 71.1dB SNR, 88dB SFDR, single 1.8V supply operation, and supports CMOS, DDR CMOS, or DDR LVDS digital outputs in a 40-pin QFN package. It is designed for high-frequency signal digitization in communications infrastructure.
For engineers reviewing the DC1369A-K datasheet, DC1369A-K pinout, DC1369A-K application, or DC1369A-K equivalent, this board enables rapid evaluation of the LTC2258-12's undersampling performance at IF frequencies up to 140MHz, its low-jitter (0.17psRMS) acquisition, configurable input range (1–2VP-P), and SPI-configurable modes including duty cycle stabilization and output randomization.
Technical Context
The DC1369A-K implements the full reference design for the LTC2258-12 ADC, including optimized layout for analog input path integrity, differential clock conditioning, and decoupled analog/digital power domains. It supports all three output formats-full-rate CMOS, double-data-rate CMOS, and double-data-rate LVDS-with selectable termination and output voltage swing via OVDD.
It integrates the required external components for internal reference operation (VREF = 1.25V, VCM = 0.9V), provides access to all mode-control pins (PAR/SER, CS, SCK, SDI, SDO), and exposes critical analog nodes (AIN+, AIN–, REFH/REFL, SENSE) for signal injection, bias tuning, and reference validation under real-world RF front-end conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Target Device | LTC2258-12 - 12-bit, 65Msps ultra-low-noise ADC with 800MHz full-power bandwidth |
| Input Interface | Differential analog input (AIN+/AIN–), 1–2VP-P selectable range, ±100mV common-mode tolerance |
| Output Options | Full-rate CMOS, DDR CMOS, or DDR LVDS; configurable via SCK and PAR/SER pins |
| Power Supply | Separate 1.8V analog (VDD) and digital output (OVDD) rails; supports 1.2V–1.8V OVDD for CMOS swing control |
| Reference Mode | Internal 1.25V reference (VREF) with programmable input range via SENSE pin (0.625V–1.3V) |
| Control Interface | SPI-compatible serial interface (CS/SCK/SDI/SDO) for configuration of randomizer, duty cycle stabilizer, nap/sleep modes |
| Sampling Clock | Differential ENC+/ENC– inputs accept sine, PECL, LVDS, TTL, or CMOS; jitter < 0.17psRMS enables clean IF undersampling |
Availability
DC1369A-K is available at Aetrix Electronics and suitable for cellular base station development, software-defined radio prototyping, portable medical imaging subsystems, and multi-channel data acquisition systems requiring stable component supply and validated high-speed ADC evaluation platforms.
Supply support for DC1369A-K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.
The DC1369A-K belongs to ADI's Linear Technology legacy evaluation board portfolio, specifically engineered to accelerate time-to-test for high-speed, low-power pipeline ADCs used in demanding wideband receiver applications.
FAQ
What is the primary function of the DC1369A-K evaluation board?
The DC1369A-K evaluation board is a fully assembled and tested hardware platform designed exclusively to demonstrate and evaluate the LTC2258-12 12-bit, 65Msps analog-to-digital converter. It provides all necessary power regulation, clock conditioning, analog input coupling, and digital output interfacing to validate AC performance-including 71.1dB SNR and 88dB SFDR-at IF frequencies up to 140MHz. The DC1369A-K enables immediate lab characterization without custom PCB design.
Does the DC1369A-K support all output modes of the LTC2258-12?
Yes, the DC1369A-K supports all three digital output configurations of the LTC2258-12: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS. Jumper settings and on-board resistors allow selection between these modes, and the board includes proper termination networks-such as 100Ω on-chip LVDS termination and configurable pull-ups for CMOS outputs-to ensure signal integrity across all modes. This flexibility makes the DC1369A-K ideal for verifying system-level timing and interface compatibility.
How is the analog input range configured on the DC1369A-K?
The DC1369A-K implements the LTC2258-12's SENSE pin functionality to configure input range: connecting SENSE to ground selects ±0.5V, to VDD selects ±1V, and applying an external voltage (0.625V–1.3V) sets ±0.8×VSENSE. The board provides test points and solder jumpers for all three options, enabling direct verification of dynamic range trade-offs-such as SNR vs. full-scale headroom-under real signal conditions. This matches the exact behavior documented in the LTC2258-12 datasheet.
Can the DC1369A-K be used with external clock sources?
Yes, the DC1369A-K accepts differential clock inputs via the ENC+/ENC– terminals and supports single-ended clocks by grounding ENC–. It accommodates sine wave, PECL, LVDS, TTL, and CMOS clock signals per the LTC2258-12 specification. The board includes AC-coupling capacitors and optional transformer-based clock conditioning to minimize jitter injection-critical for achieving the device's specified 0.17psRMS aperture jitter. This ensures accurate evaluation of undersampling performance in RF receiver designs.
Is SPI configuration supported on the DC1369A-K for the LTC2258-12?
Yes, the DC1369A-K provides full access to the LTC2258-12's SPI interface through dedicated headers for CS, SCK, SDI, and SDO. It supports both write and readback operations for configuring features such as the data output randomizer, clock duty cycle stabilizer, nap/sleep modes, and output format selection. The board includes pull-up/pull-down resistors aligned with the LTC2258-12's logic thresholds, ensuring reliable communication at up to 25MHz SCK frequency as specified in the datasheet.
DC1369A-K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Packaging:
- Box
- Product Status:
- Active
- Number of A/D Converters:
- 1
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 40M
- Data Interface:
- Parallel
- Input Range:
- 1 ~ 2Vpp
- Power (Typ) @ Conditions:
- 121.1mW @ 40MSPS
- Utilized IC / Part:
- LTC2257-12
- Contents:
- Board(s)
DC1369A-K FAQ
1.How can I place an order for DC1369A-K through Aetrix?
Please submit a Request for Quotation (RFQ) for DC1369A-K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DC1369A-K reliable?
The price and inventory of DC1369A-K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DC1369A-K is usually 5 days.
3.What payment methods are accepted for DC1369A-K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DC1369A-K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DC1369A-K?
DC1369A-K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DC1369A-K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DC1369A-K?
For technical support, including DC1369A-K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DC1369A-K requirements.
6.How does Aetrix verify that DC1369A-K is sourced from the original manufacturer or authorized distributors?
All DC1369A-K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DC1369A-K meets industry standards.
7.What is the process for return or replacement of DC1369A-K?
All DC1369A-K units undergo pre-shipment inspection (PSI). If there is an issue with DC1369A-K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DC1369A-K part is unused and in its original packaging.
Return procedure for DC1369A-K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DC1369A-K Tags

-
1083
Adafruit Industries LLC

-
1085
Adafruit Industries LLC

-
ADS7038Q1EVM-PDK
Texas Instruments

-
ADS8688EVM-PDK
Texas Instruments

-
EVAL-AD7606C18FMCZ
Analog Devices Inc.

-
ADS1232REF
Texas Instruments

-
EVAL-AD4134FMCZ
Analog Devices Inc.

-
EVAL-AD7768FMCZ
Analog Devices Inc.

-
ADC128S102EVM
Texas Instruments

-
ADS124S08EVM
Texas Instruments

-
ADC6140EVM-PDK
Texas Instruments

-
ADS7066EVM-PDK
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

