Analog Devices Inc. DC1370A-G

Overview

DC1370A-G from Analog Devices (formerly Linear Technology) is a 12-bit, 125Msps high-speed analog-to-digital converter evaluation board designed to demonstrate the LTC2261-12 ADC. It features ultralow power consumption (124mW), 70.8dB SNR, 85dB SFDR, and supports CMOS, DDR CMOS, or DDR LVDS digital outputs. The board enables IF undersampling in software-defined radios and cellular base station receivers.

For engineers reviewing the DC1370A-G datasheet, DC1370A-G pinout, DC1370A-G application, or DC1370A-G equivalent, this page provides verified hardware configuration details, supported ADC operating modes (full-rate/DDR CMOS/LVDS), clock interface requirements, analog input range selection (1–2VP-P), and SPI-based register control - all critical for RF receiver design validation and layout integration.

Technical Context

The DC1370A-G implements the LTC2261-12 in a full-featured evaluation platform with differential analog input path, selectable internal/external reference via SENSE pin, and configurable encode clock interface (ENC+/ENC–). It supports three digital output formats with independent OVDD supply (1.2–1.8V for CMOS, 1.8V for LVDS) and includes on-board clock conditioning, termination, and decoupling optimized for 800MHz full-power bandwidth operation.

Hardware-level features include SPI port access (CS/SCK/SDI/SDO) for real-time mode configuration (randomizer, duty cycle stabilizer, shutdown), parallel/serial programming mode selection via PAR/SER, and dedicated ground separation (GND/OGND) to minimize digital switching noise coupling into the analog signal chain.

Key Specifications

Availability

DC1370A-G is available at Aetrix Electronics and suitable for cellular base station development, software-defined radio prototyping, and portable medical imaging systems requiring stable component supply and rapid ADC evaluation capability.

Supply support for DC1370A-G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The DC1370A-G belongs to ADI's high-speed data converter evaluation platform family, engineered specifically to accelerate time-to-test for RF-sampling ADCs used in wideband communication infrastructure and instrumentation applications.

FAQ

What is the primary function of the DC1370A-G evaluation board?

The DC1370A-G evaluation board is a fully assembled and tested hardware platform for the LTC2261-12 12-bit, 125Msps analog-to-digital converter. Its primary function is to enable rapid characterization of AC/DC performance, digital interface timing, and system-level integration of the DC1370A-G in RF receiver applications such as cellular base stations and software-defined radios.

Does the DC1370A-G support both single-ended and differential clock inputs?

Yes, the DC1370A-G supports both configurations for the ENC+ and ENC– inputs. When ENC– is tied to ground, the board operates in single-ended mode using ENC+ as the clock input. In differential mode, ENC+ and ENC– accept complementary signals (e.g., sine wave, LVDS, PECL), enabling low-jitter sampling critical for undersampling architectures in the DC1370A-G design.

Can the DC1370A-G be used with external reference sources?

Yes, the DC1370A-G supports external reference operation via the SENSE pin. Applying a voltage between 0.625V and 1.3V to SENSE configures the DC1370A-G for an input range of ±0.8 × V_SENSE, allowing precise matching to external DACs or signal chain components without relying on the internal 1.25V reference.

What digital output formats does the DC1370A-G support out-of-the-box?

The DC1370A-G supports three digital output formats: full-rate CMOS, double-data-rate (DDR) CMOS, and DDR LVDS - all implemented directly on the board with appropriate termination and level-shifting. Output format selection is controlled by the SCK pin state and PAR/SER configuration, enabling flexible interfacing with FPGAs or ASICs in the DC1370A-G system.

Is SPI communication required to configure the DC1370A-G, or are there default operational settings?

The DC1370A-G powers up in a functional default state (full-rate CMOS output, internal reference, randomizer disabled) and requires no SPI configuration to acquire data. However, SPI (via CS/SCK/SDI/SDO) is necessary to enable advanced features of the DC1370A-G such as clock duty cycle stabilization, nap/shutdown modes, output randomization, and reference selection - all accessible through the onboard LTC2261-12's serial port.