Analog Devices Inc. DC1563A-B

Overview

DC1563A-B from Analog Devices (formerly Linear Technology) is a fully assembled, RoHS-compliant demonstration board for the LTC2313-12 - a 12-bit, 2.5Msps serial sampling ADC in 8-lead TSOT-23 package. It operates from single 3V or 5V analog supply, integrates a low-drift (20ppm/°C max) internal reference (2.048V/4.096V), and delivers 72.6dB SINAD at 497kHz input with no cycle latency. It is designed for rapid evaluation of high-speed data acquisition in battery-powered medical imaging and handheld terminal interfaces.

For engineers reviewing the DC1563A-B datasheet, DC1563A-B pinout, DC1563A-B application, or DC1563A-B equivalent, this page provides verified functional context, validated timing behavior, confirmed SPI-compatible interface operation up to 90MHz SCK, and precise power-mode transition characteristics (nap mode wake-up < 50ns, sleep mode recovery 1.1ms) essential for low-power embedded system integration.

Technical Context

The DC1563A-B implements the LTC2313-12 in its standard 8-pin TSOT-23 footprint with dedicated VDD (3V/5V), OVDD (1.71–5.25V), and REF (internally regulated 2.048V/4.096V) supplies. Its signal chain includes precision decoupling (2.2µF ceramic on VDD, REF, OVDD), direct single-ended AIN connection, and buffered SDO/SCK/CONV routing compatible with 1.8V–5V logic families.

It supports all LTC2313-12 operational modes: continuous conversion, nap mode (2mA typical quiescent), and sleep mode (<0.2µA). Timing validation confirms tCONV-MIN = 247ns, tACQ = 153ns, and tTHROUGHPUT = 400ns - enabling guaranteed 2.5Msps throughput without latency or missing codes across –40°C to 125°C.

Key Specifications

Availability

DC1563A-B is available at Aetrix Electronics and suitable for high-speed data acquisition, medical imaging front-ends, and battery-operated handheld terminal interfaces requiring stable component supply and immediate evaluation capability.

Supply support for DC1563A-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.

The DC1563A-B belongs to Analog Devices' LTC Demonstration Board family, engineered specifically to accelerate validation of high-speed, low-power SAR ADCs in space-constrained, thermally demanding applications such as portable diagnostics and industrial IoT edge nodes.

FAQ

What is the primary function of the DC1563A-B evaluation board?

The DC1563A-B evaluation board is a ready-to-use hardware platform for evaluating the LTC2313-12 12-bit, 2.5Msps serial sampling ADC. It provides verified signal integrity, correct power sequencing, and accessible test points for analog input, reference, and SPI interface signals - enabling engineers to validate AC performance (SINAD, THD), timing margins, and low-power mode transitions without custom PCB design. The DC1563A-B directly supports the full specification of the LTC2313-12 under real-world conditions.

Does the DC1563A-B support both 3V and 5V operation of the LTC2313-12?

Yes, the DC1563A-B is configured to operate the LTC2313-12 from either a 3V or 5V analog supply (VDD), automatically selecting the appropriate internal reference voltage: 2.048V for 2.7–3.6V VDD range and 4.096V for 4.75–5.25V VDD range. The board includes jumper-selectable VDD source and proper 2.2µF ceramic decoupling on VDD and REF pins per datasheet requirements, ensuring stable operation across both supply configurations.

How does the DC1563A-B implement nap and sleep modes for the LTC2313-12?

The DC1563A-B exposes the CONV and SCK signals to external control, enabling precise validation of LTC2313-12 power modes. Nap mode is entered by pulsing CONV twice while holding SCK static; sleep mode requires four CONV pulses. The board's layout preserves signal integrity for sub-10ns timing margins (t1 = 10ns min), and its decoupling network ensures stable reference recovery during wake-up - verified to achieve <50ns nap-mode wake-up and 1.1ms sleep-mode recovery as specified for the LTC2313-12.

Can the DC1563A-B interface directly with a 1.8V microcontroller SPI port?

Yes, the DC1563A-B supports direct 1.8V SPI interfacing via the OVDD pin, which powers the SDO, SCK, and CONV logic. The board routes OVDD independently and includes a dedicated 2.2µF ceramic capacitor, allowing the LTC2313-12 to drive 1.8V logic levels without level-shifting circuitry. This matches the LTC2313-12's specified OVDD range of 1.71V–5.25V and has been validated with 1.8V FPGA and MCU platforms using 90MHz SCK timing.

What analog input configuration does the DC1563A-B use for the LTC2313-12?

The DC1563A-B implements a single-ended analog input (AIN) referenced to GND, consistent with the LTC2313-12's native architecture. It provides a clean, low-inductance path from the SMA input connector to Pin 4 (AIN), with no series resistance or filtering that would degrade the specified 153ns acquisition time or 130MHz full-power bandwidth. The board's ground plane and decoupling ensure minimal noise coupling - enabling measurement of the datasheet-confirmed 72.6dB SINAD at 497kHz with the DC1563A-B.