Analog Devices Inc. DC1564A-H

Overview

DC1564A-H from Analog Devices (formerly Linear Technology) is a high-performance evaluation board for the LTC2158-12 dual 12-bit 310Msps analog-to-digital converter. It enables full characterization of AC/DC performance-including 67.6dBFS SNR, 88dB SFDR, and 1.25GHz full-power bandwidth-under real-world signal chain conditions. Designed for RF sampling applications in cellular basestations and software-defined radios, it supports differential analog input, DDR LVDS output, and SPI configuration.

For engineers reviewing the DC1564A-H datasheet, DC1564A-H pinout, DC1564A-H application, or DC1564A-H equivalent, this page delivers verified hardware interface details, validated layout practices for high-speed ADCs, clocking guidance for undersampling up to 900MHz, and direct reference to the LTC2158-12's serial programming register map and LVDS timing constraints.

Technical Context

The DC1564A-H implements a complete signal acquisition path for the LTC2158-12, featuring transformer-coupled analog front-end with selectable 5–150MHz (T1) or 150–900MHz (T2) baluns, precision 1.8V LDO regulation for VDD/OVDD, and impedance-matched DDR LVDS routing to FPGA-compatible headers. Its PCB stack-up includes controlled-impedance 100Ω differential traces and dedicated ground planes per channel to preserve crosstalk < –95dB.

It supports all LTC2158-12 operating modes: internal/external reference selection via SENSE pin, programmable LVDS current (1.75–4.5mA), clock duty cycle stabilization (30–70% input tolerance), and CLKOUT phase shifting (0°–315° in 45° steps). The board integrates SPI interface circuitry for register A2/A3 configuration and provides test points for ENC+/ENC–, CLKOUT+/CLKOUT–, and OF+/OF– monitoring.

Key Specifications

Availability

DC1564A-H is available at Aetrix Electronics and suitable for RF receiver design, high-definition video digitization, and automated test equipment requiring stable component supply and validated high-speed ADC evaluation platforms.

Supply support for DC1564A-H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The DC1564A-H belongs to ADI's Linear Technology evaluation board family, engineered specifically to accelerate prototyping and validation of ultra-high-speed data converters in demanding RF and instrumentation applications.

FAQ

What is the primary function of the DC1564A-H evaluation board?

The DC1564A-H evaluation board is a fully assembled and tested platform designed to demonstrate and validate the performance of the LTC2158-12 dual 12-bit 310Msps analog-to-digital converter. It provides all necessary signal conditioning, power regulation, clock distribution, and digital interface circuitry to enable immediate bench testing and system integration without custom PCB development. DC1564A-H supports full characterization of dynamic parameters including SNR, SFDR, and crosstalk across its 1.25GHz input bandwidth.

Does the DC1564A-H support both internal and external voltage reference configurations for the LTC2158-12?

Yes, the DC1564A-H supports both reference modes. By default, the SENSE pin is tied to VDD to enable the LTC2158-12's internal 1.25V reference and 1.32V_P-P input range. A solder jumper allows reconfiguration to accept an external 1.23–1.27V reference applied to the SENSE pin, enabling precise input range scaling per application requirements. This flexibility is documented in the DC1564A-H user guide and aligns with LTC2158-12's reference specification table.

Can the DC1564A-H be used to evaluate undersampling performance at RF frequencies above 140MHz?

Yes, the DC1564A-H is explicitly validated for RF undersampling up to 900MHz using its high-frequency balun option (T2: MABA-007159-000000). Its analog front-end maintains amplitude flatness and phase balance critical for >150MHz operation, and the board's layout minimizes parasitic coupling that degrades SFDR at high IFs. Measured performance data-including 32K-point FFTs at 383MHz, 421MHz, 567MHz, and 907MHz-is published in the LTC2158-12 datasheet and confirmed on DC1564A-H hardware.

How does the DC1564A-H handle clock duty cycle variation for the LTC2158-12 encode inputs?

The DC1564A-H routes ENC+/ENC– signals through matched-length, 100Ω differential traces and provides test points for probing. While the board itself does not implement active duty cycle correction, it fully supports the LTC2158-12's optional on-chip clock duty cycle stabilizer-enabled via SPI register A2 or parallel mode CS control. When activated, this feature allows the LTC2158-12 on DC1564A-H to maintain full 310Msps performance with encode duty cycles from 30% to 70%, as specified in the device's timing characteristics table.

Is the DC1564A-H compatible with common FPGA development platforms for LVDS data capture?

Yes, the DC1564A-H outputs DDR LVDS data and clock signals on standard 0.1"-pitch 2×20-pin headers with 100Ω differential impedance matching. These signals are directly compatible with Xilinx Kintex/Virtex and Intel Stratix/Arria FPGA I/O banks configured for LVDS_25 or LVDS standards. The board includes CLKOUT+/CLKOUT– with programmable 0°–315° phase shift (via LTC2158-12 register A2), enabling precise setup/hold timing alignment with FPGA capture logic-verified in ADI reference designs.