Analog Devices Inc. DC1620A-M

Overview

DC1620A-M from Analog Devices (formerly Linear Technology) is an evaluation board for the LTC2145-12, a 12-bit, 125Msps dual-channel simultaneous-sampling ADC. It supports CMOS, DDR CMOS, and DDR LVDS output modes, delivers 70.6dB SNR and 89dB SFDR at 70MHz input, and operates from a single 1.8V supply - enabling high-fidelity digitization in software-defined radios and portable medical imaging systems.

For engineers reviewing the DC1620A-M datasheet, DC1620A-M pinout, DC1620A-M application, or DC1620A-M equivalent, this page provides verified board-level specifications, interface configuration guidance, power delivery requirements, FPGA-compatible timing constraints, and direct replacement options for rapid prototyping and system validation.

Technical Context

The DC1620A-M implements full hardware support for the LTC2145-12's differential analog inputs (AIN1±/AIN2±), configurable clock encoding (ENC+/ENC–), and selectable output formats via onboard jumpers and SPI-controlled registers. It integrates precision 1.25V internal reference routing, matched 50Ω LVDS termination, and low-jitter (<0.08ps RMS) sampling clock conditioning.

Board-level design includes dedicated VCM1/VCM2 bias networks, independent VDD/OVDD decoupling (0.1μF ceramic per supply rail), exposed-pad thermal management for the QFN-64 host ADC, and on-board SDO/SCK/CS/SCK headers compatible with standard Digilent Pmod™ logic levels (1.8V/3.3V).

Key Specifications

Availability

DC1620A-M is available at Aetrix Electronics and suitable for software-defined radio development, portable ultrasound front-ends, and multi-channel data acquisition systems requiring stable component supply, traceable sourcing, and long-term lifecycle support.

Supply support for DC1620A-M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The DC1620A-M belongs to ADI's Linear Technology evaluation board portfolio, designed specifically to accelerate adoption of high-speed, low-power ADCs like the LTC2145 family in RF and instrumentation applications.

FAQ

What is the primary function of the DC1620A-M evaluation board?

The DC1620A-M evaluation board is a fully assembled and tested platform for evaluating the LTC2145-12 dual 12-bit, 125Msps ADC. It enables rapid characterization of AC performance (SNR, SFDR), timing margins, output interface behavior (CMOS/LVDS), and power consumption under real-world signal conditions - all without custom PCB design. The board includes all necessary decoupling, clock conditioning, and reference circuitry required to operate the DC1620A-M as specified in the LTC2145-12 datasheet.

Does the DC1620A-M support both single-ended and differential clock inputs?

Yes, the DC1620A-M supports both configurations. Its ENC+/ENC– inputs accept differential signals (LVDS, PECL, or sine wave) or single-ended operation (with ENC– tied to GND), as defined by the underlying LTC2145-12 specification. The board provides SMA connectors and onboard termination options to maintain signal integrity across both modes - critical for validating jitter-sensitive undersampling applications using the DC1620A-M.

Can the DC1620A-M be used with FPGA development kits?

Yes, the DC1620A-M is FPGA-compatible. Its digital outputs (CMOS or DDR LVDS) align with standard FPGA I/O voltage levels (1.2V/1.5V/1.8V OVDD), and its SPI interface (CS/SCK/SDI/SDO) connects directly to common FPGA GPIO or dedicated SPI peripherals. Timing parameters including ENC-to-data delay (1.1–3.1ns), pipeline latency (6–6.5 cycles), and skew (≤0.6ns) are documented in the LTC2145-12 datasheet and validated on the DC1620A-M - ensuring reliable integration into FPGA-based data capture systems.

What power supplies are required to operate the DC1620A-M?

The DC1620A-M requires two regulated supplies: a 1.8V analog rail (VDD) for the LTC2145-12 core and a separate 1.2V, 1.5V, or 1.8V digital output rail (OVDD) depending on selected interface mode. These are delivered via the board's screw-terminal header. Onboard LDOs and extensive 0.1μF ceramic decoupling ensure compliance with LTC2145-12's strict supply noise requirements - essential for achieving the 70.6dB SNR specified for the DC1620A-M.

Is the DC1620A-M compatible with other members of the LTC214x-12 family?

Yes, the DC1620A-M is mechanically and electrically compatible with the LTC2144-12 (105Msps) and LTC2143-12 (80Msps), which share identical 64-pin QFN packaging, pinout, and register map. Users can swap these variants onto the same DC1620A-M board to compare trade-offs between speed, power (109–183mW), and dynamic range - making the DC1620A-M a flexible platform for selecting the optimal LTC214x-12 device for a given application.