Analog Devices Inc. DC1762A-C

Overview

DC1762A-C from Analog Devices (formerly Linear Technology) is a high-performance evaluation board designed to demonstrate the LTC2165 16-bit, 125Msps analog-to-digital converter. It supports full-rate CMOS, DDR CMOS, and DDR LVDS output modes; delivers 76.8dB SNR and 90dB SFDR at 70MHz input; and operates from a single 1.8V analog supply. The board enables rapid prototyping for IF sampling in software-defined radio and cellular base station receiver chains.

For engineers reviewing the DC1762A-C datasheet, DC1762A-C pinout, DC1762A-C application, or DC1762A-C equivalent, this page provides verified hardware configuration details, validated signal integrity layout practices, supported clocking topologies (single-ended TTL/CMOS or differential LVDS/PECL), SPI register access methods, and thermal management guidance specific to the LTC2165 QFN-48 package on the DC1762A-C platform.

Technical Context

The DC1762A-C implements the LTC2165 ADC in its highest-speed variant (125Msps), with all analog and digital supplies decoupled using low-ESR ceramic capacitors per Linear's recommended layout. It integrates a precision 50Ω matched input network for differential analog signals up to 550MHz full-power bandwidth and includes on-board clock conditioning circuitry supporting both single-ended and differential encode inputs.

Board-level features include configurable termination for DDR LVDS outputs (100Ω differential), selectable VCM biasing via onboard resistors, jumper-controlled PAR/SER mode selection for serial vs. parallel programming, and dedicated test points for ENC+, ENC–, CLKOUT+, CLKOUT–, and all 16 data lines - enabling real-time timing validation per the LTC2165's 1.1ns–3.2ns ENC-to-data delay spec.

Key Specifications

Availability

DC1762A-C is available at Aetrix Electronics and suitable for software-defined radio development, cellular base station receiver prototyping, and portable medical imaging systems requiring stable component supply and proven high-speed ADC reference design validation.

Supply support for DC1762A-C includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs for precision instrumentation, communications, and industrial applications.

The DC1762A-C belongs to Analog Devices' LTC evaluation board family, engineered specifically to accelerate time-to-prototype for high-speed data converters - emphasizing signal integrity, power integrity, and layout reproducibility for RF-sampling applications.

FAQ

What is the primary function of the DC1762A-C evaluation board?

The DC1762A-C evaluation board is a fully assembled and tested hardware platform for the LTC2165 16-bit, 125Msps analog-to-digital converter. Its purpose is to enable immediate characterization, system integration, and performance validation - including AC specifications (SNR, SFDR), timing margins, clock jitter sensitivity, and digital interface interoperability - without requiring custom PCB design. DC1762A-C provides direct access to all critical signals and configuration options defined in the LTC2165 datasheet.

Does the DC1762A-C support differential clock input for the LTC2165?

Yes, the DC1762A-C supports both single-ended and differential clock inputs to the LTC2165 ENC+/ENC– pins. It includes SMA connectors for differential LVDS/PECL clock sources and provisions for AC-coupled single-ended TTL/CMOS clocks. The board implements proper 100Ω differential termination and common-mode biasing, aligning with the LTC2165's specified 0.07ps_RMS aperture jitter requirement under differential encode conditions.

Can the DC1762A-C be used to evaluate DDR LVDS output timing compliance?

Yes, the DC1762A-C provides test points and edge-mounted connectors for all DDR LVDS data pairs (D0_1± through D14_15±) and associated CLKOUT±, enabling direct oscilloscope measurement of ENC-to-data delay (1.1–3.2ns), DATA-to-CLKOUT skew (≤0.6ns), and differential voltage swing (247–454mV). These measurements validate conformance to the LTC2165's LVDS timing specifications under actual operating conditions.

How is the analog input range configured on the DC1762A-C?

The DC1762A-C supports selectable 1V_P-P or 2V_P-P differential input ranges via onboard resistor networks that adjust the REFH/REFL reference divider. Input common-mode voltage is set by the LTC2165's internal VCM pin (Pin 1), which is buffered and routed to the analog input network. This matches the LTC2165's specified ±2LSB INL and ±0.5LSB DNL performance across temperature when used with the board's calibrated reference path.

Is SPI register access available on the DC1762A-C for configuring LTC2165 features?

Yes, the DC1762A-C exposes the LTC2165's full SPI interface (CS, SCK, SDI, SDO) via a 0.1"-spaced header. Users can configure features such as clock duty cycle stabilization, data output randomization, nap/sleep modes, and output format selection using standard SPI commands. The board includes pull-up/pull-down resistors matching LTC2165's VIH/VIL thresholds, ensuring reliable communication at up to 25MHz SCK frequency as specified in the datasheet.