Analog Devices Inc. DC1763A-A

Overview

DC1763A-A from Analog Devices (formerly Linear Technology) is an evaluation board for the LTC2195 - a 16-bit, 125Msps dual-channel simultaneous-sampling analog-to-digital converter. It features 76.8dB SNR, 90dB SFDR, ultralow 0.07ps_RMS jitter, serial LVDS outputs, and operates from a single 1.8V supply. Designed for high-fidelity digitization of IF signals in software-defined radios and portable medical imaging systems.

For engineers reviewing the DC1763A-A datasheet, DC1763A-A pinout, DC1763A-A application, or DC1763A-A equivalent, this page delivers verified hardware configuration details, supported sampling modes (1/2/4-lane LVDS), clock interface options (differential/single-ended ENC), SPI programmability, and thermal/mechanical integration guidance for rapid prototyping of wideband receiver front-ends.

Technical Context

The DC1763A-A implements a complete signal chain around the LTC2195 ADC, including precision differential analog input conditioning with selectable 1V_P-P to 2V_P-P range, on-board 1.8V LDOs for VDD/OVDD, and configurable LVDS output termination. It supports all three serialization modes (1/2/4-lane) and both internal and external reference configurations via the SENSE pin.

Board-level design incorporates low-inductance grounding (multiple vias to OGND), optimized RF layout for 550MHz full-power bandwidth, and dedicated test points for ENC+, ENC–, AIN1±, AIN2±, DCO+, FR+, and all LVDS data lanes. The SPI interface (CS/SCK/SDI/SDO) enables real-time register configuration without firmware dependency.

Key Specifications

Availability

DC1763A-A is available at Aetrix Electronics and suitable for software-defined radio development, cellular base station prototyping, portable ultrasound imaging, and multi-channel data acquisition requiring stable component supply and validated reference design fidelity.

Supply support for DC1763A-A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and healthcare markets.

The DC1763A-A belongs to ADI's LTC evaluation board family, engineered to accelerate time-to-prototype for high-speed data converters by delivering production-ready layout, calibrated performance validation, and comprehensive documentation aligned with LTC2195's full specification envelope.

FAQ

What is the primary function of the DC1763A-A evaluation board?

The DC1763A-A evaluation board is a fully assembled and tested platform designed specifically to evaluate the LTC2195 dual-channel 16-bit 125Msps ADC. It provides immediate access to all critical interfaces - analog inputs, LVDS data outputs, encode clock, SPI control, and reference configuration - enabling rapid characterization of AC performance (SNR, SFDR), timing behavior, and system integration without custom PCB development. The board ships with documented test procedures and performance plots referenced directly to the LTC2195 datasheet.

Does the DC1763A-A support both differential and single-ended encode clock inputs?

Yes, the DC1763A-A supports both differential and single-ended encode clock inputs as defined by the LTC2195's ENC+/ENC– interface. When ENC– is tied to ground, the board operates in single-ended mode; when driven differentially with complementary signals, it uses the full differential input path. The onboard circuitry preserves the LTC2195's specified 0.07ps_RMS jitter performance in either configuration, and the duty cycle stabilizer remains active to maintain sampling accuracy across varying clock duty cycles.

Can the DC1763A-A be used to evaluate lower-speed variants like the LTC2194 or LTC2193?

Yes, the DC1763A-A is compatible with the pin-compatible LTC2194 (105Msps) and LTC2193 (80Msps) because all three devices share identical 52-pin QFN packaging, register maps, LVDS serialization architecture, and power/ground pinouts. The board's hardware design - including decoupling, layout, and signal routing - meets the requirements for all speed grades. Users simply load the appropriate configuration settings via SPI to match the target device's maximum sample rate and power profile.

How is the analog input common-mode voltage set on the DC1763A-A?

The DC1763A-A sets analog input common-mode voltage using the LTC2195's internal VCM1 and VCM2 outputs (pins 1 and 14), each nominally at VDD/2 (0.9V). These are routed to the AIN1± and AIN2± input networks via low-impedance paths and bypassed with 0.1µF ceramic capacitors per channel. This eliminates the need for external common-mode biasing circuitry and ensures optimal linearity and noise performance across the full 1V_P-P to 2V_P-P input range supported by the LTC2195.

What LVDS output current levels and termination options does the DC1763A-A support?

The DC1763A-A supports both 1.75mA and 3.5mA LVDS output current levels, selected via the SDO pin in parallel programming mode or through SPI register writes in serial mode. It also enables optional internal 100Ω differential termination for each LVDS pair (e.g., OUT1A+/–, DCO+/–), eliminating the need for external resistors. These settings are fully configurable and preserved across power cycles when stored in nonvolatile memory on the LTC2195.