Analog Devices Inc. DC1826A-E

Overview

DC1826A-E from Analog Devices is a demonstration board for the LTC6655LN-2.5 precision voltage reference IC, delivering 2.5V ±0.025% output with 0.12ppm_P-P (0.1Hz–10Hz) noise and 2ppm/°C max drift over –40°C to 125°C. It supports low-noise data acquisition in high-resolution ADC applications requiring stable, calibrated reference sources.

For engineers reviewing the DC1826A-E datasheet, DC1826A-E pinout, DC1826A-E application, or DC1826A-E equivalent, this page provides verified hardware configuration details, noise-reduction capacitor guidance, thermal hysteresis performance (30ppm, –40°C to 85°C), LS8 package stability data, and direct evaluation of LTC6655LN-2.5 startup time (400µs) and load regulation (<14ppm/mA sourcing).

Technical Context

The DC1826A-E implements the LTC6655LN-2.5 in its high-stability 8-lead LS8 ceramic LCC (5mm × 5mm) package, featuring dedicated NR (Noise Reduction) pin operation with 100µF capacitor support to achieve 0.12ppm_P-P low-frequency noise. It validates full-temperature-range performance (–40°C to 125°C) and confirms <20µA shutdown current when SHDN is grounded.

This board integrates input bypassing (0.1µF), output capacitance (2.7µF–100µF), and star-grounded GND connections at Pin 4 per Analog Devices' layout recommendations. It enables measurement of VOUT_F sourcing/sinking capability (±5mA), line regulation (≤25ppm/V), and long-term drift (20ppm/√kHr) under real-world PCB thermal stress conditions.

Key Specifications

Availability

DC1826A-E is available at Aetrix Electronics and suitable for high-precision data acquisition, medical instrumentation, and automotive sensor calibration requiring stable component supply and traceable evaluation hardware.

Supply support for DC1826A-E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and communications markets.

The DC1826A-E belongs to Analog Devices' Linear Technology evaluation board family, designed specifically to validate the LTC6655/LTC6655LN series of ultra-low-noise, low-drift voltage references in demanding measurement applications.

FAQ

What is the primary function of the DC1826A-E evaluation board?

The DC1826A-E evaluation board is a fully assembled and tested platform for characterizing the LTC6655LN-2.5 precision voltage reference IC. It enables engineers to measure low-frequency noise (0.12ppm_P-P), verify thermal hysteresis (30ppm), validate startup time (400µs), and confirm NR pin functionality with external capacitors - all using the LS8 hermetic package deployed in production-grade designs. DC1826A-E provides direct access to all pins including SHDN, VIN, VOUT_F, and NR.

Does DC1826A-E support both MSOP and LS8 package variants of the LTC6655LN-2.5?

No - DC1826A-E is configured exclusively for the LTC6655LN-2.5 in the 8-lead LS8 ceramic LCC (5mm × 5mm) package. The board's layout, grounding scheme, and thermal design are optimized for the LS8's hermetic construction and star-grounding requirement at Pin 4. It does not support the plastic MSOP variant, which uses different thermal and mechanical characteristics and lacks the LS8's humidity immunity and 30ppm hysteresis spec.

How is noise reduction implemented on the DC1826A-E?

Noise reduction on the DC1826A-E is implemented via the NR pin (Pin 6) of the LTC6655LN-2.5, which accepts an external capacitor to ground. The board includes footprint and routing optimized for 100µF tantalum or film capacitors, enabling the documented 0.12ppm_P-P (0.1Hz–10Hz) noise floor. This configuration reduces wideband noise without affecting DC accuracy or temperature drift, and is validated per Figure 34–35 in the LTC6655/LTC6655LN Rev. J datasheet. DC1826A-E provides test points for probing NR node integrity.

What are the key thermal performance metrics validated by DC1826A-E?

DC1826A-E validates three critical thermal metrics of the LTC6655LN-2.5 in LS8 packaging: (1) full-temperature-range drift ≤2ppm/°C (–40°C to 125°C), (2) thermal hysteresis of 30ppm over –40°C to 85°C cycles, and (3) long-term stability of 20ppm/√kHr. These values are measured under controlled board-level thermal cycling and confirmed against the datasheet's LS8-specific characterization - distinguishing it from MSOP-based evaluations. DC1826A-E includes thermal vias and copper pour aligned with LS8's 120°C/W θ_JA.

Can DC1826A-E be used to evaluate load regulation and sourcing/sinking capability?

Yes - DC1826A-E supports direct measurement of load regulation and bidirectional current capability. Its VOUT_F (Pin 7) is routed to a test point with Kelvin sense capability, enabling accurate measurement of <14ppm/mA sourcing and <35ppm/mA sinking error per the LTC6655LN-2.5 LS8 specification. The board accommodates external load transients up to ±5mA and includes provisions for injecting current steps to characterize settling behavior and output impedance vs. frequency - as shown in Figures G12–G13 and G22–G23 of the datasheet. DC1826A-E delivers verified performance matching the LS8's published load regulation curves.