Analog Devices Inc. DC213A

Overview

LTC1406 from Analog Devices (formerly Linear Technology) is a low-power, 8-bit, 20Msps sampling analog-to-digital converter with true differential inputs, ±1V input span, and 250MHz sample-and-hold bandwidth. It operates from a single 5V supply, draws 150mW, achieves ±1LSB DNL/INL over temperature, and delivers 47.5dB S/(N+D) at 10MHz Nyquist input - enabling high-speed undersampling in wireless baseband receivers.

For engineers reviewing the LTC1406 datasheet, LTC1406 pinout, LTC1406 application, or LTC1406 equivalent, key selection criteria include its 20MHz sampling rate with 5-cycle pipeline latency, rail-to-rail analog input common-mode range (0V to VDD), separate OVDD/OGND for 3V/5V digital interfacing, and 1µA power-down current - critical for portable and battery-sensitive signal acquisition systems.

Technical Context

The LTC1406 employs a 5-stage pipelined ADC architecture with an integrated 250MHz differential sample-and-hold amplifier, enabling accurate acquisition of both single-ended and differential signals up to 100MHz input frequency. Its internal bias voltage (VBIAS = 2.2V) and external 2.5V reference (VREF) support flexible full-scale span configuration between ±1V differential and 2V single-ended.

Dynamic performance is defined by 60dB THD at 1MHz, 62dB THD at 10MHz, and 60dB spurious-free dynamic range (SFDR) at Nyquist, with 60dB common-mode rejection maintained up to 10MHz. The OF/UF overflow/underflow flag provides real-time out-of-range detection without requiring external logic.

Key Specifications

Pinout & Package

Package: 24-lead narrow SSOP (GN package), 0.15mm pitch, JEDEC MS-013AC compliant, footprint compatible with standard SSOP reflow profiles.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed, low-power ADC applications.

Compared with AD9203ARUZ and MAX1186ETL+, the LTC1406 uniquely balances 5V operation, separate OVDD/OGND, 1µA shutdown, and 250MHz input bandwidth - making it the only option supporting both legacy 5V logic integration and battery-constrained undersampling architectures.

Availability

LTC1406 is available at Aetrix Electronics and suitable for wireless infrastructure, digital video processing, and portable test equipment requiring stable component supply across extended temperature ranges (–40°C to 85°C).

Supply support for LTC1406 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and DSP technologies, serving precision instrumentation, communications, and industrial markets.

The LTC1406 belongs to Linear's legacy high-speed data converter family, designed specifically for low-power, wideband sampling in space-constrained and thermally sensitive applications such as handheld radios and medical imaging front-ends.

FAQ

What is the maximum input frequency the LTC1406 can accurately sample?

The LTC1406 features a 250MHz small-signal input bandwidth in its internal sample-and-hold amplifier, allowing accurate undersampling of input signals well beyond its 10MHz Nyquist frequency. At 70MHz input, it maintains 7 effective bits; spectral performance remains usable up to 100MHz with measurable SFDR degradation. For optimal S/(N+D), keep input frequencies below 10MHz.

Does the LTC1406 require an external reference voltage?

Yes, the LTC1406 requires an external reference voltage applied to the VREF pin, typically 2.5V (e.g., LT1460-2.5). The VREF range is 2V–3V, and it directly sets the full-scale input span: ±1V differential or 2V single-ended. No internal reference is provided - omitting VREF will result in undefined conversion accuracy and code distribution.

Can the LTC1406 interface directly with a 3.3V FPGA?

Yes, the LTC1406 supports direct 3.3V FPGA interfacing via its dedicated OVDD and OGND pins. Set OVDD = 3.3V and connect D7–D0 and OF/UF to the FPGA's 3.3V I/O bank. CLK and SHDN remain 5V-tolerant (VIH = 2.4V min), so no level shifters are needed for control signals - simplifying PCB layout and reducing component count.

How does the OF/UF pin function in the LTC1406?

The OF/UF pin is an active-high overflow/underflow flag. When high with D7–D0 = 11111111, the input exceeded +1V differential; when high with D7–D0 = 00000000, the input fell below –1V differential. When low, the input lies within the valid ±1V range. This flag enables real-time clipping detection in firmware without post-processing.

What is the power-up initialization requirement for the LTC1406?

After power application or clock stoppage >100µs, the LTC1406 requires ≥20 consecutive clock cycles at ≥10kHz before output data becomes valid. This resets internal pipeline states and ensures proper bias settling. Skipping this sequence results in invalid or metastable output codes until the condition is met.