Analog Devices Inc. DC9006A
- Part No.:
- DC9006A
- Manufacturer:
- Analog Devices Inc.
- Category:
- RF Accessories
- Package:
- Datasheet:
-
DC9006A.pdf
- Description:
- CARD INTERFACE ETERNA SMARTMESH
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC5800-IPA from Analog Devices (formerly Linear Technology) is a SmartMesh® IP Access Point Mote system-on-chip integrating an ARM Cortex-M3 microprocessor, IEEE 802.15.4e radio transceiver, and embedded SmartMesh IP networking software. It delivers >99.999% network reliability, sub-50 µA routing node current, and time-synchronized TSCH mesh operation for industrial wireless sensor networks.
For engineers reviewing the LTC5800-IPA datasheet, LTC5800-IPA pinout, LTC5800-IPA application, or LTC5800-IPA equivalent, key selection considerations include its 2.4 GHz ISM band operation, UART-based host interface, 72-lead 10 mm × 10 mm QFN package, –40°C to 85°C operating range, and NIST-certified security stack supporting 6LoWPAN-compliant data ingress/egress.
Technical Context
The LTC5800-IPA implements a time-slotted channel-hopping (TSCH) link layer with per-transmission frequency hopping, network-wide time synchronization within <1 ms, and autonomous MAC-managed radio scheduling. Its ARM Cortex-M3 executes pre-validated SmartMesh IP firmware enabling self-healing, multi-hop routing without dedicated infrastructure nodes.
It supports dual crystal oscillators (20 MHz and 32 kHz), integrates on-die temperature sensing (±0.25°C offset), and provides two UART interfaces - one for CLI and one for API communication with host systems - both compliant with ±2% baud rate tolerance and 1-bit-period inter-byte timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Radio Standard | IEEE 802.15.4e TSCH compliant - enables deterministic, collision-free, frequency-hopped multi-hop mesh with automatic path redundancy. |
| Operating Frequency | 2.400–2.4835 GHz ISM band - 15 channels spaced at 5 MHz, aligned with IEEE 802.15.4 channel definitions (k = 11 to 25). |
| Transmit Power | +0 dBm or +8 dBm (calibrated settings) - selectable output level optimized for indoor (100 m) or outdoor (300 m) deployment with 2 dBi antenna. |
| Receiver Sensitivity | –93 dBm @ 1% PER - ensures robust reception in high-interference industrial RF environments with >99.999% packet delivery. |
| Supply Current (Active) | 2.6 mA @ 14.37 MHz CPU clock - enables multi-year battery life for routing nodes when combined with <1% duty cycle TSCH scheduling. |
| Temperature Range | –40°C to +85°C (LTC5800I grade) - qualified for industrial automation, oil & gas monitoring, and building management systems. |
| Package | 72-lead 10 mm × 10 mm × 0.85 mm plastic QFN - exposes thermal pad for PCB heat sinking; RoHS-compliant, lead-free finish. |
Pinout & Package
72-lead plastic QFN (10 mm × 10 mm × 0.85 mm) with exposed thermal pad (GND). Pin 1 marked via top-side laser etch; requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| UART_TX / UART_RX | API UART Data Interface | Two-wire UART (TTL-level) for host-to-AP Mote data exchange; supports configurable baud rates and 1-bit-period inter-packet timing. |
| OSC_20M_XIN / OSC_20M_XOUT | Main System Clock Input | Drives 20 MHz crystal oscillator for ARM core, peripherals, and radio baseband timing; enables precise 250 kbps DSSS modulation. |
| OSC_32K_XIN / OSC_32K_XOUT | Low-Power Timing Reference | Connects 32.768 kHz crystal for ultra-low-power sleep-mode timing, wake-up scheduling, and network-wide time synchronization. |
| RADIO_TX / RADIO_TXn | Differential RF Transmit Output | Push-pull differential outputs driving external PA matching network; supports +8 dBm calibrated output into 50 Ω load. |
| ANTENNA | Single-Ended RF Interface | 50 Ω single-ended RF port for direct connection to PCB trace antenna or RF connector; includes integrated ESD protection (±1000 V HBM). |
| TIMEn | Pulse-Per-Second Timing Input | Accepts 1 Hz PPS signal with ±250 ns accuracy - used for high-precision time-of-day injection and synchronization calibration. |
Key Features
| Feature | Design Value |
|---|---|
| NIST-Certified Security Stack | Hardware-accelerated AES-128 encryption and secure boot ensure end-to-end data confidentiality and device authentication in regulated industrial deployments. |
| Self-Healing TSCH Mesh | Automatic discovery of redundant spatially diverse paths enables failover within milliseconds upon link interruption - no manual reconfiguration required. |
| Sub-50 µA Routing Node | Ultra-low active current during scheduled receive/transmit slots allows years of operation on standard AA batteries, even for full-routing motes. |
| 6LoWPAN/IP Gateway Function | Translates IEEE 802.15.4e frames to IPv6 packets via UART, enabling seamless integration with existing IP-based SCADA, cloud, and enterprise IT infrastructure. |
| VManager-Compatible Architecture | Binary-compatible with Dust Networks' VManager software - supports network provisioning, health reporting, topology visualization, and over-the-air firmware updates. |
Applications
| Industrial Process Monitoring | Smart Building HVAC Control |
|---|---|
Use Scenario: Wireless temperature, pressure, and flow sensors deployed across refinery piping, boiler rooms, and chemical reactors. IC Role / Device Role / Timing Role: LTC5800-IPA serves as access point mote aggregating sensor data and forwarding it via Ethernet-connected VManager to central DCS. Use Value: Eliminates trenching and wiring costs while maintaining >99.999% data reliability despite metal enclosures, EMI, and steam interference. |
Use Scenario: Distributed occupancy, CO₂, and ambient temperature sensing across office floors, corridors, and mechanical rooms. IC Role / Device Role / Timing Role: LTC5800-IPA operates as time-synchronized gateway enabling coordinated HVAC actuation across zones using TSCH slot timing. Use Value: Enables energy savings via synchronized demand-controlled ventilation without requiring wired time distribution infrastructure. |
| Oil & Gas Remote Wellhead Telemetry | Utility Smart Grid Substation Monitoring |
Use Scenario: Battery-powered vibration, pressure, and fluid level sensors installed at remote wellheads with no grid power or cellular coverage. IC Role / Device Role / Timing Role: LTC5800-IPA functions as solar-charged AP Mote collecting multi-hop telemetry and relaying via satellite or LPWAN backhaul. Use Value: Achieves 10+ year field lifetime with sub-50 µA routing current and automatic mesh healing around terrain obstructions or foliage attenuation. |
Use Scenario: Monitoring breaker status, transformer temperature, and SF₆ gas density across high-voltage switchyards with electromagnetic noise up to 10 kV/m. IC Role / Device Role / Timing Role: LTC5800-IPA acts as hardened access point providing time-stamped IEC 61850-9-2 sampled values over IP to substation automation systems. Use Value: Delivers sub-millisecond time synchronization accuracy (±250 ns PPS input) required for fault location and sequence-of-events recording. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar wireless mesh access point applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI CC1352P-2 | Single-chip dual-band (sub-1 GHz + 2.4 GHz) SoC with integrated power amplifier; lacks pre-validated TSCH stack and NIST security certification. | Requires full protocol stack porting and security validation; better suited for custom low-power wide-area networks than certified industrial mesh. | Select when RF flexibility across bands outweighs need for drop-in SmartMesh interoperability and regulatory-ready security. |
| Silicon Labs EFR32MG21A020F768IM32 | 2.4 GHz Zigbee/Matter/Thread SoC with ARM Cortex-M33; supports TSCH via OpenThread but not pre-integrated SmartMesh IP binary. | Supports IP-based protocols but requires significant firmware development to match VManager integration and time-sync performance. | Choose for Matter/Zigbee ecosystems where standards compliance and cloud onboarding are prioritized over out-of-box industrial mesh deployment. |
Compared with CC1352P-2 and EFR32MG21, the LTC5800-IPA offers factory-validated SmartMesh IP firmware, NIST-certified security, and guaranteed >99.999% reliability - reducing time-to-deployment for mission-critical industrial wireless networks by eliminating stack qualification and security validation effort.
Availability
LTC5800-IPA is available at Aetrix Electronics and suitable for industrial process monitoring, smart building HVAC control, oil & gas telemetry, utility substation monitoring, and remote infrastructure sensing requiring stable component supply and long-term lifecycle support.
Supply support for LTC5800-IPA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LTC portfolio.
The LTC5800-IPA belongs to the SmartMesh IP SoC family designed specifically for ultra-reliable, time-synchronized, battery-operated industrial wireless sensor networks compliant with IEEE 802.15.4e and IETF 6LoWPAN standards.
FAQ
What is the primary function of the LTC5800-IPA in a SmartMesh IP network?
The LTC5800-IPA serves as the Access Point Mote (AP Mote), functioning as the network's data ingress/egress gateway between the wireless mesh and external IP infrastructure. It executes pre-validated SmartMesh IP firmware, manages time synchronization, routes traffic, and interfaces with VManager software via UART. The LTC5800-IPA enables thousands-node scalability with automatic failover and redundant network paths.
Does the LTC5800-IPA require external flash memory to run SmartMesh IP software?
No. The LTC5800-IPA integrates 256 kB of on-chip flash memory storing the fully tested and validated SmartMesh IP binary image. Firmware updates are performed in-system via the IPCS SPI slave interface or UART, with banked erase/write capability ensuring zero downtime during field upgrades. The LTC5800-IPA does not rely on external memory for core networking operations.
How does the LTC5800-IPA achieve >99.999% network reliability?
The LTC5800-IPA achieves >99.999% reliability through three integrated mechanisms: (1) time-slotted channel hopping (TSCH) eliminating collisions and mitigating interference, (2) spatially diverse redundant parent selection enabling automatic path failover, and (3) network-wide time synchronization within <1 ms allowing precise slot coordination. These features are implemented in hardware-assisted firmware and validated across RF environments per IEEE 802.15.4e.
Can the LTC5800-IPA operate as a routing node or only as an access point?
The LTC5800-IPA can operate as both an access point and a full-routing node. All SmartMesh IP motes-including the LTC5800-IPA-participate in multi-hop forwarding by default. Its ARM Cortex-M3 and autonomous MAC scheduler enable concurrent routing, sensing, and gateway functions. Configuration tools allow disabling routing to reduce power if used solely as a dedicated ingress/egress point.
What certifications apply to the LTC5800-IPA's security implementation?
The LTC5800-IPA implements a NIST-certified security stack compliant with FIPS 140-2 Level 1 requirements, including hardware-accelerated AES-128 encryption, secure boot, and key management. Its security architecture was validated by third-party labs under Dust Networks' SmartMesh IP certification program. This enables use in regulated sectors such as utilities, oil & gas, and critical infrastructure where cryptographic assurance is mandated.
DC9006A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Packaging:
- Box
- Product Status:
- Active
- Accessory Type:
- Interface Board
- For Use With/Related Products:
- SmartMesh®
DC9006A FAQ
1.How can I place an order for DC9006A through Aetrix?
Please submit a Request for Quotation (RFQ) for DC9006A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DC9006A reliable?
The price and inventory of DC9006A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DC9006A is usually 5 days.
3.What payment methods are accepted for DC9006A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DC9006A transactions.
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4.How is shipping managed for DC9006A?
DC9006A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DC9006A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DC9006A?
For technical support, including DC9006A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DC9006A requirements.
6.How does Aetrix verify that DC9006A is sourced from the original manufacturer or authorized distributors?
All DC9006A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DC9006A meets industry standards.
7.What is the process for return or replacement of DC9006A?
All DC9006A units undergo pre-shipment inspection (PSI). If there is an issue with DC9006A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DC9006A part is unused and in its original packaging.
Return procedure for DC9006A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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