Texas Instruments DDC112UK
- Part No.:
- DDC112UK
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DDC112UK.pdf
- Description:
- IC ADC 20BIT SIGMA-DELTA 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,066
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DDC112UK from Texas Instruments is a dual-channel, 20-bit charge-digitizing analog-to-digital converter optimized for low-current photodetector and sensor interfaces. It features continuous dual-switched integrator architecture, ±0.025% reading integral linearity (max), 3.2 ppm rms noise at 250 pC full-scale, and operates with AVDD = DVDD = +5 V, TINT = 333.3 µs, CLK = 15 MHz, and VREF = +4.096 V in continuous mode - enabling high-precision current measurement in CT scanner data acquisition systems.
For engineers reviewing the DDC112UK datasheet, DDC112UK pinout, DDC112UK application, or DDC112UK equivalent, this page delivers verified technical context, SO-28 package mapping, confirmed 28-pin terminal roles, real-world use-value metrics for photodiode digitization and precision process control, and two validated alternative parts with documented functional and thermal differences.
Technical Context
The DDC112UK implements a true continuous-time, dual-input, dual-integrator-per-channel architecture: each input (IN1/IN2) uses two switched integrators (A/B sides) to enable uninterrupted current integration while interleaving digitization via a shared ∆Σ modulator and digital filter. Its internal programmable full-scale ranges (RANGE0–RANGE2) select seven on-chip integration capacitors (e.g., 50 pF for Range 4), supporting up to 250 pC nominal full-scale with external capacitor extension to 1000 pC.
Operation relies on precise timing coordination between CONV (integrator side selection), CLK (15 MHz system clock), and DCLK (serial data clock); conversion completes in ~220 µs per channel at 15 MHz, yielding 2–3 kHz effective throughput. The device uses VREF = +4.096 V both to reset integration capacitors and as the ∆Σ converter reference, making stability and low-noise buffering critical for offset and range accuracy.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 20-bit output with no missing codes guaranteed |
| Integral Linearity Error | ±0.025% reading ±1.0 ppm FSR (max) over 0°C to +70°C |
| Input Noise | 3.2 ppm of FSR rms at Range 5 (250 pC), CSENSOR = 0 pF, TINT = 333.3 µs |
| Conversion Rate | 2–3 kHz in continuous mode with 15 MHz CLK |
| Full-Scale Range | Programmable from –0.4% to +1000 pC using internal/external capacitors |
| Supply Voltage | AVDD/DVDD = 4.75 V to 5.25 V; single +5 V supply operation |
| Reference Voltage | VREF = +4.096 V (nominal), with 150 µA typical input current at TINT = 333.3 µs |
Pinout & Package
DDC112UK is housed in a 28-pin SOIC (SO-28) package with DW suffix, rated for 0°C to +70°C industrial temperature range. Thermal resistance θJA = +150°C/W. Pin layout supports dual independent current inputs, cascaded serial interface, and full-scale range selection via three control bits.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2 | Dual analog current inputs | Accept low-level photodiode/sensor currents; each drives two independent switched integrators (A/B) |
| CAP1A/CAP1B, CAP2A/CAP2B | External integration capacitor terminals | Enable user-defined full-scale range up to 1000 pC; paired pins per integrator side for low-inductance connection |
| RANGE0–RANGE2 | 3-bit full-scale range select | Set one of eight internal integration capacitances (e.g., 50 pF for Range 4 → 200 pC FS) |
| CONV | Integrator side control | In continuous mode: HIGH selects Integrator A for integration, LOW selects Integrator B - synchronized to CLK rising edge |
| DVALID, DOUT, DXMIT, DCLK, DIN | Synchronous serial interface | Support daisy-chaining >100 units; DVALID asserts LOW when 20-bit result is ready in shift register |
| VREF | External reference input | +4.096 V reference used for integrator reset and ∆Σ conversion; requires buffered, low-noise source |
| AGND, DGND, AVDD, DVDD | Analog/digital power domains | Separate ground and supply pins minimize noise coupling; AGND–DGND differential ≤ ±0.3 V required |
Key Features
| Feature | Design Value |
|---|---|
| Dual continuous-switched integrators per channel | Enables uninterrupted current integration: while one integrator side digitizes, the other integrates - eliminating dead time in photodiode signal capture |
| Programmable full-scale range (8 settings) | Internal capacitor selection (12.5–87.5 pF) or external capacitor support (up to 1000 pC) allows dynamic range adaptation without hardware change |
| Digital filtering with 3.2 ppm rms noise | On-chip FIR-like digital filter suppresses quantization and switching noise, delivering stable 20-bit results even with 50 pF sensor capacitance |
| Cascadable serial interface | Single DCLK/DOUT/DIN bus supports >100 DDC112UK units in series, reducing PCB routing complexity in multi-sensor CT or chromatography systems |
| Test mode with calibrated 13 pC injection | Hardware-verifiable self-test: TEST + CONV injects known charge packets into both channels for end-of-line calibration and fault detection |
Applications
| CT Scanner Data Acquisition | Infrared Pyrometer Signal Chain |
|---|---|
Use Scenario: Digitizing low-current outputs from scintillation detector photodiodes in medical CT gantries under high EMI and thermal cycling. IC Role / Device Role / Timing Role: Dual-channel charge-to-digital conversion with continuous integration ensures zero dead time between X-ray pulse acquisitions; 20-bit resolution captures subtle density gradients. Use Value: ±0.025% linearity and 3.2 ppm noise enable <1 HU (Hounsfield Unit) CT image precision; SO-28 package supports compact, thermally stable module layout. |
Use Scenario: Converting nanoamp-level photocurrent from InSb or MCT infrared detectors in non-contact temperature measurement systems. IC Role / Device Role / Timing Role: High-impedance current input directly interfaces unbuffered IR sensors; programmable full-scale adapts to varying optical path losses across measurement distances. Use Value: 0.1 pA input bias current and 50 pC–1000 pC range flexibility maintain sub-0.1°C repeatability; VREF-stable design prevents drift-induced calibration errors. |
| Liquid Chromatography Detector | Blood Analysis Photometer |
Use Scenario: Measuring transient photocurrent peaks from UV-Vis absorbance detectors during solvent gradient elution in HPLC systems. IC Role / Device Role / Timing Role: Dual-input capability captures reference and sample channel simultaneously; 333.3 µs integration time matches peak dwell times without aliasing. Use Value: Cascadable serial interface enables synchronized multi-detector readout; 20-bit dynamic range resolves trace analyte peaks amid strong solvent front signals. |
Use Scenario: Quantifying low-light chemiluminescence or fluorescence in clinical blood analyzers where reagent reaction currents fall below 1 nA. IC Role / Device Role / Timing Role: Direct photodiode digitization eliminates op-amp noise sources; test mode injects 13 pC for automated calibration before each assay run. Use Value: ±600 ppm offset error (max) and 0.5 ppm/°C offset drift ensure <2% CV in hemoglobin or CRP concentration reporting across lab ambient temperature swings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar charge-digitizing ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7739BRUZ | 24-bit sigma-delta ADC with 16.7 µV rms noise; single-channel; requires external integrator; 5 V supply only | Higher resolution but lacks dual-input continuous integration; suited for static weigh-scale, not fast photodiode pulses | Select AD7739BRUZ only when absolute 24-bit DC stability outweighs need for dual-channel, zero-dead-time acquisition |
| ADS1258IPWR | 24-bit delta-sigma ADC; 8-channel multiplexed; 10 µV rms noise; no integrated switched integrators; 2.7–5.25 V supply | Requires external I/V and integrator stages; better for multi-sensor DC monitoring than pulsed photodiode digitization | Choose ADS1258IPWR for cost-sensitive, lower-speed multi-channel systems where board space permits discrete integrator design |
Compared with DDC112UK, AD7739BRUZ offers higher resolution but no native dual-channel continuous integration, while ADS1258IPWR provides channel count and supply flexibility at the cost of added external components and reduced suitability for high-fidelity photodiode pulse capture.
Availability
DDC112UK is available at Aetrix Electronics and suitable for CT scanner DAS, infrared pyrometry, liquid chromatography, and clinical blood analysis requiring stable component supply across extended production lifecycles and industrial temperature operation.
Supply support for DDC112UK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in precision analog, embedded processing, and high-reliability ICs for industrial, medical, and test equipment markets.
The DDC112UK belongs to TI's precision charge-digitizing ADC product line, designed specifically for direct photodiode and low-current sensor interfacing in medical imaging, analytical instrumentation, and scientific measurement systems.
FAQ
What is the maximum full-scale input charge supported by the DDC112UK?
The DDC112UK supports up to 1000 pC full-scale input charge when external integration capacitors are used with RANGE2–RANGE0 = 000. With internal capacitors only, the maximum is 350 pC (Range 7, 87.5 pF). This 1000 pC capability enables direct digitization of high-output photodiodes or transimpedance amplifier outputs without signal attenuation or gain staging - preserving SNR and simplifying front-end design for the DDC112UK.
How does the DDC112UK achieve continuous integration with only one ∆Σ converter?
The DDC112UK achieves continuous integration using two independent switched integrators per input channel (IN1A/IN1B and IN2A/IN2B). While one integrator side (e.g., IN1A) is being digitized by the shared ∆Σ converter, the other (IN1B) simultaneously integrates incoming current - and vice versa. This interleaved operation, controlled by the CONV signal synchronized to CLK, eliminates dead time and ensures uninterrupted signal capture for the DDC112UK.
What is the purpose of the TEST pin on the DDC112UK, and how is it used?
The TEST pin on the DDC112UK enables hardware-calibrated self-test: when asserted HIGH before a CONV edge, it grounds IN1 and IN2 and injects precise 13 pC charge packets into all four integrators. This allows factory or field verification of gain, offset, and linearity without external stimulus - critical for medical and analytical instruments requiring traceable calibration. The DDC112UK test mode is fully documented in SBAS085B Rev. October 2004.
Why does the DDC112UK require a buffered +4.096 V reference on the VREF pin?
The DDC112UK uses VREF for two critical functions: resetting integration capacitors to a known voltage at cycle start, and serving as the reference for the ∆Σ converter during digitization. Any droop or noise on VREF directly introduces offset error and full-scale drift. A buffered source (e.g., REF3040 + OPA350) maintains stability under dynamic current demand (~150 µA at TINT = 333.3 µs), ensuring consistent performance for the DDC112UK across temperature and time.
Can multiple DDC112UK devices be synchronized for simultaneous sampling?
Yes - multiple DDC112UK devices can be synchronized using a common CLK and CONV signal routed with matched trace lengths. Because integration timing is determined by CONV edges aligned to CLK, and digitization is interleaved per device, precise inter-device phase alignment ensures simultaneous integration windows. The DDC112UK's cascaded serial interface (DIN/DOUT) then allows consolidated readout without additional timing control lines.
DDC112UK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- 20
- Sampling Rate (Per Second):
- 3k
- Number of Inputs:
- 2
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- DSI-ADC
- Ratio - S/H:ADC:
- 2:1
- Number of A/D Converters:
- 1
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
DDC112UK FAQ
1.How can I place an order for DDC112UK through Aetrix?
Please submit a Request for Quotation (RFQ) for DDC112UK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DDC112UK reliable?
The price and inventory of DDC112UK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DDC112UK is usually 5 days.
3.What payment methods are accepted for DDC112UK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DDC112UK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DDC112UK?
DDC112UK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DDC112UK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DDC112UK?
For technical support, including DDC112UK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DDC112UK requirements.
6.How does Aetrix verify that DDC112UK is sourced from the original manufacturer or authorized distributors?
All DDC112UK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DDC112UK meets industry standards.
7.What is the process for return or replacement of DDC112UK?
All DDC112UK units undergo pre-shipment inspection (PSI). If there is an issue with DDC112UK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DDC112UK part is unused and in its original packaging.
Return procedure for DDC112UK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DDC112UK Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

