Texas Instruments DDC112Y/250

Overview

DDC112Y/250 from Texas Instruments is a dual-channel, 20-bit charge-digitizing analog-to-digital converter optimized for low-current photodetector and sensor interfaces. It features continuous dual-switched integrator architecture, ±0.025% integral linearity (max), 3.2 ppm rms noise at 250 pC full-scale, and single +5V supply operation. It is used in CT scanner data acquisition systems where precision integration of picoamp-level photocurrents is required.

For engineers reviewing the DDC112Y/250 datasheet, DDC112Y/250 pinout, DDC112Y/250 application, or DDC112Y/250 equivalent, key selection considerations include its TQFP-32 package, cascaded serial output interface, programmable full-scale ranges (up to 1000 pC with external capacitors), and guaranteed performance over –40°C to +85°C.

Technical Context

The DDC112Y/250 implements two independent input channels, each with paired switched integrators (A/B) enabling continuous current integration: while one integrator digitizes, the other integrates. Its delta-sigma modulator and digital filter deliver 20-bit resolution with 3.2 ppm rms noise at Range 5 (250 pC) and C_SENSOR = 0 pF.

Full-scale range is selected via RANGE0–RANGE2 (3-bit parallel control), supporting eight internal capacitor values (e.g., 50 pF to 87.5 pF) or external capacitors up to 1000 pF. Conversion timing is synchronized to CLK (10 MHz nominal), with integration time configurable from 50 µs to 1 ms in non-continuous or continuous mode.

Key Specifications

Pinout & Package

TQFP-32 package with exposed thermal pad (PJT); pin-compatible with DDC112Y family variants. Pin functions validated per TI SBAS085B datasheet Rev. October 2004.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar charge-digitizing ADC applications.

Compared with AD7739BRUZ and ADS1258IPWR, the DDC112Y/250 uniquely integrates dual switched-capacitor integrators, eliminating external op-amps and multiplexers needed for continuous photodiode current digitization - reducing BOM count and layout area in medical and analytical instrumentation.

Availability

DDC112Y/250 is available at Aetrix Electronics and suitable for CT scanner data acquisition, infrared pyrometry, liquid chromatography detection, blood analysis instrumentation, and precision process control requiring stable component supply across extended temperature ranges.

Supply support for DDC112Y/250 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and medical-grade ICs.

The DDC112Y/250 belongs to TI's high-precision charge-digitizing ADC product line, designed specifically for direct photodetector and low-current sensor interfacing in diagnostic imaging, analytical instrumentation, and industrial metrology.

FAQ

What is the maximum full-scale input charge supported by the DDC112Y/250?

The DDC112Y/250 supports up to 1000 pC full-scale input charge when external integration capacitors are used with RANGE2–RANGE0 = 000. With internal capacitors only, the maximum is 350 pC (Range 7). This scalability allows the DDC112Y/250 to accommodate diverse sensor output ranges without redesigning the analog front end.

Does the DDC112Y/250 require separate analog and digital ground planes?

Yes - the DDC112Y/250 has dedicated AGND and DGND pins that must be connected to separate ground planes joined at a single point near the device. This separation minimizes digital switching noise coupling into the precision analog integration path, preserving the DDC112Y/250's 3.2 ppm rms noise performance.

Can the DDC112Y/250 operate with a system clock slower than 10 MHz?

Yes - the DDC112Y/250 supports CLK frequencies from 1 MHz to 12 MHz (for DDC112Y grade). At lower frequencies, integration time increases proportionally, maintaining the same charge-to-digital conversion relationship. The DDC112Y/250 datasheet specifies electrical characteristics at 10 MHz, but functional operation is guaranteed across the full range.

How does the DDC112Y/250 achieve continuous integration with only one delta-sigma converter?

The DDC112Y/250 uses dual switched integrators per channel (A/B), allowing one side to integrate while the other is digitized by the shared delta-sigma converter. The CONV signal controls which integrator side is active, and the internal multiplexer routes the held integrator output to the converter - enabling true continuous current digitization without dead time in the DDC112Y/250.

Is the DDC112Y/250 pin-compatible with the SO-28 version of the DDC112?

No - the DDC112Y/250 uses a TQFP-32 (PJT) package with different pin count, layout, and terminal assignments (e.g., CAP1A/CAP1B duplicated across pins 1–2 and 31–32) versus the SO-28 (DW) package. PCB layout and footprint must be redesigned when migrating from DDC112U to DDC112Y/250; they are functionally identical but not mechanically interchangeable.