Texas Instruments DDC112YK/250

Overview

DDC112YK/250 from Texas Instruments is a dual-channel, 20-bit charge-digitizing analog-to-digital converter optimized for low-level current inputs (e.g., photodiodes), featuring ±0.025% reading ±1.0 ppm FSR integral linearity, 3.2 ppm rms noise at Range 5 (250 pC), and continuous dual-switched integrator architecture enabling uninterrupted signal acquisition in precision medical and analytical instrumentation.

For engineers reviewing the DDC112YK/250 datasheet, DDC112YK/250 pinout, DDC112YK/250 application, or DDC112YK/250 equivalent, this page delivers verified technical context, TQFP-32 package mapping, confirmed cascading serial interface behavior, real-world integration time (333.3 µs) and reference voltage (4.096 V) dependencies, and validated alternatives for charge-measurement ADC replacement.

Technical Context

The DDC112YK/250 implements two independent input channels, each with dual switched integrators (A/B per channel), allowing one side to integrate while the other undergoes ∆Σ conversion-enabling true continuous current digitization without dead time. Its internal programmable full-scale ranges (RANGE0–RANGE2) select among eight on-chip integration capacitors (12.5–87.5 pF), and external capacitor support extends full-scale range up to 1000 pC.

Conversion relies on a single shared ∆Σ modulator and digital filter, with output delivered via synchronous serial interface (DCLK, DXMIT, DOUT, DIN, DVALID). It operates from a single +5 V supply (AVDD/DVDD), uses VREF = +4.096 V for integrator reset and A/D reference, and requires CONV clock synchronization to CLK rising edge (±10 ns) for optimal noise performance.

Key Specifications

Pinout & Package

TQFP-32 package with 0.8 mm pitch, thermally enhanced pad, and 5 mm × 5 mm body. Pin 1 = CAP1A (Integrator 1A feedback capacitor terminal); pin 32 = CAP1B (Integrator 1B feedback capacitor terminal); pin 29 = IN1; pin 28 = IN2; pin 22 = VREF; pins 21/27/30 = AGND; pins 13/15 = DGND/DVDD; pins 16–18 = RANGE0–RANGE2; pins 9–11 = DCLK/DXMIT/DIN; pin 14 = DOUT; pin 15 = DVALID; pin 7 = CONV; pin 8 = CLK; pin 6 = TEST.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar charge-measurement ADC applications.

Compared with DDC112YK/250, AD7739BRUZ offers higher bit depth but requires external signal conditioning and lacks true continuous dual-channel operation, while ADS124S08IPWR integrates excitation but omits the specialized charge-integration architecture essential for low-noise photodiode digitization in medical imaging.

Availability

DDC112YK/250 is available at Aetrix Electronics and suitable for CT scanner data acquisition systems, infrared pyrometry, liquid/gas chromatography detectors, and clinical blood analysis instruments requiring stable component supply with guaranteed long-term traceability.

Supply support for DDC112YK/250 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in high-precision data converters and medical-grade signal chain solutions.

The DDC112YK/250 belongs to TI's precision charge-digitizing ADC product line, engineered specifically for direct photodiode and sensor current digitization in diagnostic imaging, analytical instrumentation, and laboratory equipment.

FAQ

What is the operating temperature range for the DDC112YK/250?

The DDC112YK/250 is specified for 0°C to +70°C ambient operation, matching its "K" grade designation. This range ensures stable performance in laboratory instrumentation and clinical analyzers where environmental control is maintained, and it differs from the "Y" grade (–40°C to +85°C) used in industrial or field-deployed systems. All electrical specifications-including integral linearity error (±0.025% reading ±1.0 ppm FSR) and noise (3.2 ppm rms)-are guaranteed within this range.

How does the DDC112YK/250 achieve continuous current integration?

The DDC112YK/250 achieves continuous current integration using two switched integrators per channel (A and B). While Integrator A accumulates charge from IN1 or IN2, Integrator B is digitized by the shared ∆Σ modulator-and vice versa-eliminating dead time between conversions. This architecture is controlled by the CONV signal synchronized to CLK, ensuring seamless signal acquisition critical for CT scanner pulse trains and chromatography peak detection.

Can the DDC112YK/250 interface directly with photodiodes without external op-amps?

Yes, the DDC112YK/250 interfaces directly with photodiodes and other low-level current sources. Its input stage functions as a true current-to-charge integrator with virtual-ground inputs (IN1/IN2 referenced to AGND), eliminating the need for external transimpedance amplifiers. Input bias current is ≤10 pA (typ), and the device supports full-scale ranges down to –0.2 pC (Range 1), making it suitable for ultra-low-current photodiode applications such as blood analysis and pyrometry.

What is the role of the VREF pin on the DDC112YK/250, and what voltage must it supply?

The VREF pin on the DDC112YK/250 supplies a +4.096 V reference used both to reset the integration capacitors at the start of each cycle and as the reference for the ∆Σ modulator during conversion. It must be stable and low-noise-TI recommends buffering with an op-amp (e.g., OPA350) and local decoupling (0.1 µF + 10 µF). Droop in VREF introduces offset error proportional to integration time, so stability over temperature and time is essential for maintaining the ±0.025% linearity spec of the DDC112YK/250.

How many devices can be cascaded using the DDC112YK/250's serial interface?

The DDC112YK/250 supports daisy-chaining of over 100 units using its synchronous serial interface (DCLK, DXMIT, DOUT, DIN, DVALID). Data is shifted out MSB-first; DIN of one device connects to DOUT of the previous. The interface operates independently of the internal CLK frequency, allowing flexible timing-e.g., 15 MHz CLK for conversion and 12 MHz DCLK for data retrieval. This scalability makes the DDC112YK/250 ideal for multi-sensor arrays in chromatography and CT scanner DAS.