Texas Instruments DDC114IRTCT

Overview

DDC114IRTCT from Texas Instruments is a 20-bit, quad-channel, current-input analog-to-digital converter with dual-switched integrator front-ends per channel, ±0.01% reading ±0.5 ppm FSR integral linearity, 5.2 ppm FSR rms noise, and adjustable full-scale ranges from 12 pC to 350 pC - enabling direct digitization of photodiode, CT scanner, and pyrometer sensor currents.

For engineers reviewing the DDC114IRTCT datasheet, DDC114IRTCT pinout, DDC114IRTCT application, or DDC114IRTCT equivalent, this page delivers verified technical context, QFN-48 package mapping, daisy-chain serial interface behavior, low-power/high-speed mode trade-offs, and validated alternative options for precision current measurement systems.

Technical Context

The DDC114IRTCT implements four independent current-input channels, each with two time-interleaved switched integrators feeding two shared ∆Σ modulators and digital filters. Integration time is programmable from 50 µs to 1 s, and full-scale range is selected via RANGE0–RANGE2 pins across eight on-chip trimmed capacitors (3–87.5 pF), ensuring matched gain and <0.5% range error across all inputs.

Its synchronous serial interface uses differential DCLK/DCLK and DOUT/DOUT signals, supports daisy-chaining without external logic, and operates independently of the internal 4–19.2 MHz system clock (CLK). Mode selection (HISPD/LOPWR) directly controls power per channel (13.5 mW vs. 18 mW) and maximum data rate (2.5 kSPS vs. 3.125 kSPS).

Key Specifications

Pinout & Package

DDC114IRTCT is housed in a 48-pin QFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are fully defined in TI SBAS255C Rev. April 2009, including dual differential I/O pairs (DCLK/DCLK, DOUT/DOUT, DIN/DIN) and dedicated analog/digital ground separation (AGND/DGND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-channel current-input ADC applications.

Compared with AD7768-4 and ADS131M04, the DDC114IRTCT uniquely integrates dual-switched current-mode integrators - eliminating external TIAs, reducing component count, and delivering unmatched low-noise linearity for picoampere-level photodiode and detector applications.

Availability

DDC114IRTCT is available at Aetrix Electronics and suitable for CT scanner data acquisition systems, infrared pyrometers, photodiode sensor arrays, and liquid/gas chromatography detectors requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for DDC114IRTCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, medical, and test equipment markets.

The DDC114IRTCT belongs to TI's precision current-input ADC product line, engineered specifically for direct digitization of low-level sensor currents in medical imaging, analytical instrumentation, and scientific measurement systems.

FAQ

What is the maximum input current the DDC114IRTCT can safely handle?

The DDC114IRTCT has an absolute maximum analog input current rating of 750 µA. Exceeding this value may cause permanent damage. For reliable operation within specifications, input current should remain within the selected full-scale range (e.g., ≤350 pC for Range 7 at typical integration times). The device's dual-integrator architecture inherently limits instantaneous current stress during integration cycles, but sustained overcurrent must be avoided using external limiting or clamping circuits.

How does the DDC114IRTCT achieve its ±0.01% integral linearity specification?

The DDC114IRTCT achieves ±0.01% integral linearity through factory-trimmed on-chip integration capacitors (CF), matched dual-switched integrator topology per channel, and correlated double sampling that cancels offset and gain errors. Each of the eight capacitor values (3–87.5 pF) is laser-trimmed during production to ensure <0.5% range error match across all channels and sides. The dual-integrator interleaving also suppresses nonlinearities arising from switch charge injection and amplifier settling.

Can the DDC114IRTCT operate with a 2.7 V digital supply while using a 5 V analog supply?

Yes, the DDC114IRTCT supports DVDD from 2.7 V to 5.25 V independently of AVDD (4.75–5.25 V). At DVDD = 2.7 V, digital I/O thresholds scale accordingly (VIH ≥ 2.16 V, VIL ≤ 0.54 V), and total power dissipation decreases proportionally - e.g., ~11.5 mW/channel in Low-Power mode. All timing parameters and functionality remain valid across the full DVDD range, enabling flexible power domain partitioning in mixed-voltage systems.

What is the purpose of the TEST pin on the DDC114IRTCT, and how is it used?

The TEST pin on the DDC114IRTCT enables in-system diagnostics: holding TEST high disables all analog inputs (forcing zero-current measurement), while strobing TEST low→high injects ~11 pC of calibrated charge into the integrators - independent of integration time. This allows validation of gain, linearity, and digital path integrity without external signal generators. Data retrieval and timing behave identically to normal operation, making TEST ideal for production testing and field calibration.

Does the DDC114IRTCT require external components for stable VREF operation?

Yes, the DDC114IRTCT requires a buffered, low-noise 4.096 V reference at the VREF pin. TI recommends using a precision reference (e.g., REF3140) followed by an op-amp buffer (e.g., OPA350) with local 0.1 µF and 10 µF decoupling capacitors. Unbuffered or poorly filtered VREF causes offset drift (>±100 ppm/°C), gain error, and increased noise - because VREF resets the integrator capacitors and defines full-scale scaling. The reference must supply ~75 µA average current during conversion.