Texas Instruments DDC232CZXGT
- Part No.:
- DDC232CZXGT
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-LFBGA
- Datasheet:
-
DDC232CZXGT.pdf
- Description:
- IC ADC 20BIT SIGMA-DELTA 64NFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:660
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Product details
Overview
DDC232CZXGT from Texas Instruments is a 20-bit, 32-channel, current-input analog-to-digital converter with dual-switched integrator front-end architecture. It delivers ±0.025% integral linearity, 5.3ppm FSR noise, and 7mW/channel power dissipation, enabling direct digitization of photodiode and X-ray detector currents in medical CT scanner data acquisition systems.
For engineers reviewing the DDC232CZXGT datasheet, DDC232CZXGT pinout, DDC232CZXGT application, or DDC232CZXGT equivalent, this page provides verified technical context, package mapping, real-world use scenarios, and validated alternative options for low-power, high-precision current measurement systems.
Technical Context
The DDC232CZXGT implements a continuous-time dual-switched integrator per channel, allowing simultaneous integration on one side while digitizing the other-enabling uninterrupted current measurement across all 32 inputs. Its delta-sigma A/D core operates at up to 6.2kSPS (DDC232CK) or 3.125kSPS (DDC232C), with integration times adjustable from 166.5ms to 1s.
It uses an external +4.096V reference (VREF) to reset on-chip integration capacitors (87.5pF max), supporting full-scale ranges from 12.5pC to 350pC. The device features daisy-chainable serial interface (DIN/DOUT/DCLK/DVALID), configuration register access via DIN_CFG/CLK_CFG/RESET, and separate analog/digital supplies (AVDD = +5V, DVDD = +2.7V to +3.6V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 20-bit output with no missing codes; 19-bit guaranteed monotonicity ensures precise low-current quantization without code gaps. |
| Integral Linearity | ±0.025% of reading ±1.0ppm of FSR - enables sub-0.03% end-point accuracy critical for calibrated medical imaging systems. |
| Input Noise | 5.3ppm of FSR rms at Range 7 - translates to ~1.68fC rms noise for 350pC full-scale, supporting femtoampere-level photodiode signal fidelity. |
| Data Rate | 3.125kSPS maximum - supports real-time CT scan frame rates with 32-channel parallel acquisition and minimal inter-channel skew. |
| Power Dissipation | 7mW per channel (224mW total) - allows dense multi-DDC232CZXGT layouts in thermally constrained DAS modules without forced cooling. |
| Full-Scale Range | Adjustable from 12.5pC to 350pC via 3-bit range control - accommodates diverse sensor types (e.g., fast-response PIN diodes vs. slow scintillator photodiodes) without external gain switching. |
| Supply Voltages | AVDD = +4.75V to +5.25V; DVDD = +2.7V to +3.6V - enables interoperability with standard 5V analog and 3.3V digital subsystems in industrial and medical equipment. |
Pinout & Package
BGA-64 package (10mm × 10mm, 0.8mm pitch) with exposed thermal pad; pin-compatible with DDC232CK variant and optimized for low-noise mixed-signal PCB layout using separate AGND/DGND planes and local 0.1µF bypassing per supply rail.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1–IN32 | Analog Input | 32 single-ended current-input channels; each connects directly to photodiode cathodes or sensor outputs without external transimpedance amplifiers. |
| AGND / DGND | Analog/Digital Ground | Dedicated quiet analog ground (QGND at H5) and split digital ground pins prevent coupling of digital switching noise into sensitive integrator stages. |
| VREF (A6, B6) | Reference Input | Accepts stable +4.096V external reference; voltage directly sets full-scale charge range and must be buffered to avoid offset drift during capacitor reset cycles. |
| CONV | Conversion Control | Asynchronous edge-triggered input toggling between Side A and Side B integrators; must be synchronized within ±10ns of CLK rising edge for optimal noise performance. |
| DVALID / DOUT / DIN / DCLK | Serial Interface | Synchronous daisy-chain interface: DVALID signals valid 20-bit words on DOUT; DCLK clocks data out at up to 20MHz; DIN used only for multi-device cascading. |
| CLK / CLK_CFG / DIN_CFG / RESET | System Timing & Config | CLK drives internal timing; CLK_CFG/DIN_CFG load 12-bit configuration register (range/format/Clk_4x); RESET asynchronously initializes state machines and clears registers. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-switched integrator per channel | Enables true continuous current integration - eliminates dead time between conversions and supports real-time monitoring of rapidly varying radiation flux. |
| On-chip trimmed integration capacitors | Seven factory-trimmed capacitor values (3–87.5pF) ensure ≤0.5% range error match across all 32 channels, removing need for per-channel calibration in production. |
| In-package bypass capacitance support | Integrated 0.1µF decoupling capability simplifies layout by reducing discrete capacitor count and minimizing loop inductance near AVDD/DVDD pins. |
| Daisy-chainable serial interface | Single DOUT-to-DIN connection links multiple DDC232CZXGT devices under common CLK/DCLK, cutting FPGA I/O usage by >90% in 128+ channel CT DAS designs. |
| Configurable 16-/20-bit output format | Format bit selects word length - 16-bit mode reduces data throughput and memory footprint for applications where 19-bit monotonicity is sufficient. |
Applications
| CT Scanner DAS | Photodiode Sensor Array |
|---|---|
Use Scenario: Digitizing current outputs from 32-channel scintillator-photodiode arrays in third-generation rotating CT gantries. IC Role / Device Role / Timing Role: Primary current-to-digital conversion engine; performs continuous integration synchronized to gantry rotation and X-ray pulse timing. Use Value: 3.125kSPS sustained rate and <5.3ppm noise enable sub-millimeter spatial resolution reconstruction without averaging artifacts. | Use Scenario: High-density optical sensing in industrial laser alignment systems with 32-position position-sensitive detectors (PSDs). IC Role / Device Role / Timing Role: Simultaneous low-noise digitization of all PSD quadrant currents; integrates over programmable 166–1000ms windows to suppress ambient light interference. Use Value: Adjustable full-scale range (12.5–350pC) accommodates varying irradiance levels across positions without hardware reconfiguration. |
| X-Ray Detection Systems | Scientific Instrumentation |
Use Scenario: Readout of gas ionization chamber currents in portable radiation survey meters requiring battery-powered operation. IC Role / Device Role / Timing Role: Low-power current digitizer operating from single 5V supply; integrates fA–nA signals with 7mW/channel efficiency. Use Value: 350pC full-scale range and ±0.025% linearity support NIST-traceable dose calibration across five decades of input current. | Use Scenario: Multi-channel lock-in amplifier front-end in cryogenic physics experiments measuring weak photoemission currents. IC Role / Device Role / Timing Role: Precision integrating ADC with ultra-low bias current (±0.1pA) and matched input offsets (<100ppm FSR), rejecting thermal EMF drift. Use Value: Dual-integrator architecture allows synchronous integration and readout, eliminating settling delays that degrade phase-sensitive detection accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar current-input ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADAS1000-3BCPZ | 5-channel, 24-bit, integrated ECG front-end with lead-off detection; requires external current-to-voltage stage for photodiode inputs. | Optimized for biopotential acquisition, not low-current photodetection; lacks on-chip integrators and daisy-chain capability. | Select when medical-grade ECG/EEG signal chain integration is primary requirement, not multi-channel photodiode digitization. |
| ADS131M08IPBSR | 8-channel, 24-bit delta-sigma ADC with programmable gain amplifier; no built-in current-input integrator; 16.8mW/channel typical power. | Requires external transimpedance amplifiers for current inputs; higher power prevents dense 32-channel deployment in space-constrained DAS. | Choose for general-purpose high-resolution voltage measurement where sensor output is already conditioned to voltage domain. |
Compared with ADAS1000-3BCPZ and ADS131M08IPBSR, the DDC232CZXGT uniquely combines 32-channel current-input integration, daisy-chain serial interface, and 7mW/channel power in a single BGA package-making it irreplaceable for scalable, low-noise, high-channel-count photodiode digitization in medical and scientific instrumentation.
Availability
DDC232CZXGT is available at Aetrix Electronics and suitable for CT scanner DAS, photodiode sensor arrays, and X-ray detection systems requiring stable component supply, long-term lifecycle support, and traceable sourcing for Class II medical device manufacturing.
Supply support for DDC232CZXGT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision data converters and medical imaging ICs.
The DDC232 product line was designed specifically for high-channel-count, low-current digitization in computed tomography and radiation detection systems-prioritizing ultra-low noise, exceptional linearity, and seamless scalability via daisy-chained architecture.
FAQ
What is the maximum integration time supported by the DDC232CZXGT?
The DDC232CZXGT supports integration times from 166.5ms up to 1,000ms in continuous mode. This range is set by the system clock (CLK) frequency and the Clk_4x configuration bit, enabling precise control over charge accumulation for currents spanning femtoamperes to milliamperes. The DDC232CZXGT achieves its specified 5.3ppm noise floor at 333ms integration in Range 7.
Does the DDC232CZXGT require external transimpedance amplifiers for photodiode inputs?
No, the DDC232CZXGT does not require external transimpedance amplifiers. Its integrated dual-switched integrator front-end accepts current inputs directly-each of the 32 INx pins connects straight to photodiode cathodes. The DDC232CZXGT performs current-to-voltage conversion internally using factory-trimmed on-chip capacitors, eliminating external components and associated noise sources.
How does the DDC232CZXGT handle daisy-chaining with multiple devices?
The DDC232CZXGT supports daisy-chaining via its dedicated serial interface: DOUT of one device connects to DIN of the next, while CLK, DCLK, and CONV are shared across all devices. The DDC232CZXGT's internal shift register outputs 20-bit words sequentially, enabling a single FPGA interface to manage 64, 96, or more channels without additional I/O expansion. Configuration is handled independently per device using DIN_CFG/CLK_CFG.
What is the role of the VREF pin on the DDC232CZXGT and what voltage should be applied?
The VREF pin on the DDC232CZXGT supplies the reference voltage used to reset the on-chip integration capacitors before each integration cycle and serves as the scaling reference for the delta-sigma A/D converter. A stable +4.096V is required-TI specifies 4.000V to 4.200V tolerance-and must be externally buffered (e.g., with OPA350) to prevent droop-induced offset errors. Unbuffered or noisy VREF directly degrades DDC232CZXGT integral linearity and full-scale accuracy.
Can the DDC232CZXGT operate with different analog and digital supply voltages?
Yes, the DDC232CZXGT is designed for independent analog and digital supplies: AVDD must be +4.75V to +5.25V (nominal +5V), while DVDD operates from +2.7V to +3.6V (nominal +3.0V or +3.3V). This separation minimizes digital switching noise coupling into the precision analog integrator section. AGND and DGND are physically distinct pins and must be connected at a single point on the PCB to maintain PSRR >100ppm/V.
DDC232CZXGT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-LFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 20
- Sampling Rate (Per Second):
- 6k
- Number of Inputs:
- 32
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 16
- Architecture:
- Sigma-Delta
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 64-NFBGA (8x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
DDC232CZXGT FAQ
1.How can I place an order for DDC232CZXGT through Aetrix?
Please submit a Request for Quotation (RFQ) for DDC232CZXGT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DDC232CZXGT reliable?
The price and inventory of DDC232CZXGT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DDC232CZXGT is usually 5 days.
3.What payment methods are accepted for DDC232CZXGT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DDC232CZXGT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DDC232CZXGT?
DDC232CZXGT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DDC232CZXGT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DDC232CZXGT?
For technical support, including DDC232CZXGT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DDC232CZXGT requirements.
6.How does Aetrix verify that DDC232CZXGT is sourced from the original manufacturer or authorized distributors?
All DDC232CZXGT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DDC232CZXGT meets industry standards.
7.What is the process for return or replacement of DDC232CZXGT?
All DDC232CZXGT units undergo pre-shipment inspection (PSI). If there is an issue with DDC232CZXGT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DDC232CZXGT part is unused and in its original packaging.
Return procedure for DDC232CZXGT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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