Texas Instruments DDC264EVM

Overview

DDC264EVM from Texas Instruments is an evaluation module designed to characterize the DDC264 - a 64-channel, 20-bit, current-input analog-to-digital converter with dual switched-integrator architecture. It integrates four DDC264 ICs, a Xilinx Spartan-3 FPGA for timing and data handling, 16 MB of memory, USB 2.0 PC interface, and a high-density analog input socket supporting up to 256 channels. It enables precision evaluation of photodiode-based current measurements in scientific instrumentation and medical imaging systems.

For engineers reviewing the DDC264EVM datasheet, DDC264EVM pinout, DDC264EVM application, or DDC264EVM equivalent, this page delivers verified hardware architecture, power configuration options (J16/J19/J20/J22), FPGA-controlled timing parameters, reference voltage routing (REF3040, 4.096 V), and software-supported analysis modes including FFT, histogram, and noise bar plots.

Technical Context

The DDC264EVM implements a device-under-test (DUT) board architecture with strict analog-digital partitioning: analog section hosts four DDC264 ICs, REF3040 reference, and high-density socket; digital section contains Spartan-3 FPGA, USB microcontroller, 80 MHz oscillator (U6), 24 MHz crystal (X1), and multi-rail regulators (3.3 V, 2.5 V, 1.2 V). Power routing is configurable via jumpers J19, J20, J22, and J16 for isolated or shared 5 V supplies.

FPGA firmware generates all DDC264 control signals (CONV, CLK, DCLK, DIN_CFG), manages data capture from up to 256 channels across two integrator sides per channel, and buffers results in 16 MB SDRAM before USB transfer. Software supports 16-/20-bit output format selection, adjustable integration time (160 μs to 1 s), and full-scale range tuning (12.5 pC to 150 pC) via DDC264 internal capacitor banks.

Key Specifications

Availability

DDC264EVM is available at Aetrix Electronics and suitable for scientific instrumentation, medical imaging sensor evaluation, photodiode array testing, and precision low-current measurement system development requiring stable component supply and full evaluation ecosystem support.

Supply support for DDC264EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and high-performance data conversion technologies.

The DDC264EVM belongs to TI's precision data acquisition evaluation platform family, engineered specifically to accelerate validation of ultra-low-current, high-resolution charge-digitizing converters used in photonics, spectroscopy, and analytical instrumentation.

FAQ

What is the DDC264EVM used for?

The DDC264EVM is an evaluation module for the DDC264 64-channel, 20-bit current-input ADC. It enables engineers to validate performance metrics-including linearity (±1.0 ppm FS), noise (6.3 ppm FS), and integration flexibility (160 μs to 1 s)-in photodiode-based systems. The DDC264EVM includes FPGA-controlled signal generation, 16 MB data buffering, and Windows software for FFT, histogram, and statistical analysis-making it essential for developing precision scientific and medical sensing hardware.

Does the DDC264EVM support standalone operation without a PC?

No, the DDC264EVM requires a Windows PC running the included evaluation software for configuration, data acquisition, and analysis. It lacks onboard display, local storage, or autonomous control logic. All FPGA register settings, DDC264 configuration, and data visualization are managed exclusively through the USB-connected GUI application. The DDC264EVM does not function as a self-contained measurement instrument-it is strictly a PC-dependent evaluation platform.

How is the reference voltage routed on the DDC264EVM?

The DDC264EVM uses the REF3040 to generate a 4.096 V reference. When jumper J16 is installed, this reference is routed to pins A15, A16, B15, and B16 of header J14 for use by the Analog Input Board (AIB). Jumper J16 is not installed by default; its placement must be manually confirmed before using the onboard reference on the AIB. The reference circuit includes a 3.386 Hz low-pass filter and buffered output with 140 μF bulk capacitance to ensure low-noise stability for precision ADC evaluation.

Can the DDC264EVM evaluate fewer than four DDC264 devices?

Yes-the DDC264EVM's FPGA firmware and software support selective activation of individual DDC264 ICs. Channel count is configurable in powers of two (up to 256), and the "Channel Count" field in the FPGA Control tab allows users to define how many channels are read back. This enables focused evaluation of one or more DDC264 devices on the board, reducing data volume and simplifying debug-without hardware modification. The DDC264EVM's architecture inherently supports partial-device testing.

What power supply configurations does the DDC264EVM support?

The DDC264EVM supports three primary power configurations: (1) USB-only (5 V digital via J1, with J19 jumper set to bottom two pins), (2) separate analog/digital rails (5 V to J5 and J12, with J19/J20/J22 removed), and (3) single 7–10 V DC input via J18 (with J19 top-two pins jumpered). Green LEDs (D14, D13) confirm proper 5 V digital and analog supply presence. Incorrect jumpering may prevent FPGA configuration (D2 unlit) or cause USB enumeration failure-so configuration must match the selected power source.