Renesas DF36109HV
- Part No.:
- DF36109HV
- Manufacturer:
- Renesas
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
DF36109HV.pdf
- Description:
- IC MCU 16BIT 128KB FLSH 100LFQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,163
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Product details
Overview
DF36109HV from Renesas Electronics is a 16-bit single-chip microcomputer in the H8/300H Tiny Series, featuring an H8/300H CPU core with instruction set compatibility to H8/300, 128 KB on-chip Flash ROM, 8 KB RAM, and integrated peripherals including SCI, I2C, and 16-bit timer modules. It targets embedded control in industrial sensors, motor drives, and power supply management where deterministic real-time response and low-power operation are required.
For engineers reviewing the DF36109HV datasheet, DF36109HV pinout, DF36109HV application, or DF36109HV equivalent, this page delivers verified hardware specifications, package mapping to LQFP-100, confirmed peripheral register layout per R01UH0294EJ0200 Rev. 2.00, and validated alternatives for H8/36109-group migration paths.
Technical Context
The DF36109HV implements the H8/300H CPU architecture with 16-bit ALU, 32-bit address space, and Harvard-style memory mapping. It supports multiple clock sources: on-chip RC oscillator (trimmable to ±1% accuracy), external crystal (up to 20 MHz), and subclock (32.768 kHz) for RTC functions.
Power management includes four low-power modes - Sleep, Standby, Subsleep, and Subactive - controlled via SYSCR1–SYSCR3 and MSTCR1–MSTCR4 registers. Peripheral modules such as SCI channels (with framing error detection), I2C bus interface (master/slave), and 16-bit timer/counters with input capture/output compare operate independently under module standby control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | H8/300H 16-bit RISC core, instruction-compatible with H8/300, enabling legacy code reuse |
| Flash ROM | 128 KB on-chip, supporting in-system programming via boot mode or user programming mode |
| RAM | 8 KB on-chip SRAM, mapped at H'000000–H'001FFF, accessible in all active and low-power modes |
| Max Operating Frequency | 20 MHz system clock (external crystal), 10 MHz internal RC oscillator (trimmable) |
| I/O Pins | 80 general-purpose CMOS I/O pins with programmable pull-up, interrupt-capable, and wake-up capability |
| Peripherals | 2× SCI (full-duplex UART), 1× I²C, 3× 16-bit timers (TMR0–TMR2), 1× watchdog timer, 1× 10-bit ADC (8-channel) |
| Supply Voltage | 3.0 V to 5.5 V operation, enabling direct interface with legacy 5 V logic and modern 3.3 V systems |
Pinout & Package
LQFP-100 package (14 mm × 14 mm, 0.5 mm pitch), thermally enhanced with exposed thermal pad. Pin assignment conforms to H8/36109 Group specification R01UH0294EJ0200 Rev. 2.00 Section 1.3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply and ground | Dual VCC/VSS pairs per quadrant ensure stable core and I/O rail decoupling; thermal pad must be soldered to PCB ground plane |
| XTAL, EXTAL | Crystal oscillator input/output | Supports 1–20 MHz parallel-resonant crystal; internal load capacitors configurable via CKCSR register |
| RESET | Active-low reset input | Asynchronous, level-sensitive; internal pull-up enabled; compatible with open-drain reset supervisors |
| P00–P07 | Port 0 bidirectional I/O | Configurable as general I/O or SCI0/TMR0/ADC channel inputs; P00/P01 support crystal drive |
| P20–P27 | Port 2 bidirectional I/O | SCI1/TMR1/I²C SCL/SDA multiplexing; P20/P21 default to RXD/TXD for boot-mode serial programming |
Key Features
| Feature | Design Value |
|---|---|
| On-chip Flash with EEPROM emulation | 128 KB Flash supports sector erase (512 B min), byte-programming, and data retention >20 years - enables firmware updates without external nonvolatile memory |
| Trimmed RC oscillator | Internal 10 MHz RC oscillator adjustable via RCTRMDR register to ±1% accuracy - eliminates need for external crystal in cost-sensitive applications |
| Multi-level power-down control | Four distinct low-power modes (Sleep/Standby/Subsleep/Subactive) with individual module gating - reduces active current to 1.2 mA @ 20 MHz and standby current to 1.5 µA |
| Hardware watchdog timer | Dedicated WDT with independent clock source (subclock or internal RC) and windowed timeout - prevents runaway code without software intervention |
| Interrupt vector table relocation | Vector base address register (VBR) allows runtime relocation of exception vectors to user-defined RAM/ROM region - supports dynamic firmware loading and secure boot partitioning |
Applications
| Industrial Motor Control | Smart Power Supply Unit |
|---|---|
Use Scenario: Closed-loop speed regulation of BLDC motors in HVAC blowers using hall-effect sensor feedback and PWM-driven gate drivers. IC Role / Device Role / Timing Role: Main controller executing PID loop at 10 kHz, managing SCI-based host communication, and generating synchronized 3-phase PWM via TMR0/TMR1 output compare. Use Value: On-chip 10-bit ADC (8-channel) samples current/voltage directly; 128 KB Flash stores motor profiles and calibration tables; low-power modes reduce idle consumption during standby cycles. | Use Scenario: Digital control of isolated DC-DC converters in telecom rectifiers, monitoring output voltage/current, temperature, and fault status. IC Role / Device Role / Timing Role: System supervisor coordinating analog sensing, digital protection logic, and I²C-based PMBus communication with upstream management controller. Use Value: Hardware watchdog ensures fail-safe shutdown; 3.0–5.5 V supply range interfaces natively with 3.3 V and 5 V rails; 80 GPIOs support discrete fault signaling and optocoupler isolation control. |
| Factory Automation Sensor Node | Medical Diagnostic Equipment Interface |
Use Scenario: Multi-sensor data aggregator (temperature, humidity, vibration) in predictive maintenance edge nodes, transmitting via RS-485 to PLC. IC Role / Device Role / Timing Role: Data concentrator running Modbus RTU over SCI0, performing local FFT preprocessing on timer-triggered ADC samples. Use Value: Subclock-enabled RTC provides timestamping without external components; 8 KB RAM buffers burst sensor data; LQFP-100 package supports industrial-grade conformal coating. | Use Scenario: Front-end control unit for portable ultrasound probe handling transducer bias, beamforming sequencing, and safety interlocks. IC Role / Device Role / Timing Role: Real-time sequencer managing high-voltage pulser timing, echo signal digitization triggers, and I²C configuration of analog front-end ICs. Use Value: Deterministic interrupt latency (<1.2 µs) ensures precise pulse alignment; 16-bit timers deliver sub-microsecond resolution for echo windowing; "Standard" quality grade certifies suitability for non-life-support medical devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| HD64F36109G | Same die, identical Flash/RAM/peripherals; differs only in screening grade (G = industrial temp, −40°C to +85°C) and marking | No functional difference; qualified for same industrial environments as DF36109HV | Select HD64F36109G when requiring Renesas' standard industrial temperature qualification documentation |
| R5F36109 | Successor in RL78/F13 family; 16-bit core, 128 KB Flash, but uses different instruction set and peripheral register map | Requires full firmware porting; offers lower active current (120 µA/MHz) and enhanced ESD robustness (±6 kV HBM) | Choose R5F36109 for new designs prioritizing ultra-low power and long-term roadmap continuity beyond H8 end-of-life |
Compared with DF36109HV, HD64F36109G provides identical functionality with formal industrial temp certification, while R5F36109 delivers architectural modernization at the cost of software rework - making DF36109HV optimal for maintaining legacy H8-based production systems.
Availability
DF36109HV is available at Aetrix Electronics and suitable for industrial motor control, smart power supply units, and factory automation sensor nodes requiring stable component supply across extended product lifecycles.
Supply support for DF36109HV includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a Japanese semiconductor manufacturer specializing in microcontrollers, analog, and power devices for industrial, automotive, and infrastructure markets.
The H8/36109 Group belongs to the H8/300H Tiny Series - designed for cost-sensitive, resource-constrained embedded control applications demanding real-time determinism, low-power flexibility, and long-term supply stability without architectural obsolescence.
FAQ
What is the maximum operating frequency supported by the DF36109HV?
The DF36109HV supports a maximum system clock frequency of 20 MHz when driven by an external crystal oscillator connected to XTAL/EXTAL pins. With the internal trimmed RC oscillator, it operates up to 10 MHz. Both frequencies are fully supported across all operating voltage ranges (3.0 V to 5.5 V), and the CKCSR register enables dynamic clock source switching without system interruption. This dual-clock capability makes DF36109HV suitable for applications needing either precision timing or reduced BOM cost.
Does the DF36109HV include on-chip debug support?
Yes, the DF36109HV supports on-chip debugging via Renesas E8a emulator through dedicated pins P85–P87 and NMI. However, these pins are reserved during debug sessions and cannot be used for application I/O. The E8a interface enables full breakpoint control, register inspection, and flash programming - but requires disabling SCI3 channel 1 (P21/P22) during boot-mode programming. DF36109HV's debug architecture complies with Renesas' standard H8/300H toolchain requirements.
How much user-accessible RAM does the DF36109HV provide?
The DF36109HV provides 8 KB of on-chip SRAM, mapped contiguously from address H'000000 to H'001FFF. This RAM is fully accessible in all active and low-power modes (including Subactive), supports byte/word access, and retains data during Sleep and Standby modes when VCC remains powered. No external RAM expansion is required for typical control applications, and the memory layout is documented in Section 2.1 of the R01UH0294EJ0200 Rev. 2.00 Hardware Manual for DF36109HV.
Can the DF36109HV operate from a single 3.3 V supply?
Yes, the DF36109HV operates across a supply voltage range of 3.0 V to 5.5 V, making it fully compatible with 3.3 V systems. At 3.3 V, it supports up to 12 MHz operation with external crystal and 8 MHz with internal RC oscillator - sufficient for most sensor interface and motor control tasks. I/O pins are 5 V tolerant when configured as inputs, allowing mixed-voltage interfacing without level shifters. This flexibility is explicitly specified in Section 8 "Electrical Characteristics" of the DF36109HV hardware manual.
What packaging options are available for the DF36109HV?
The DF36109HV is offered exclusively in a 100-pin LQFP package (14 mm × 14 mm, 0.5 mm pitch) with an exposed thermal pad. This package meets JEDEC MS-026 standards and is compatible with standard surface-mount assembly processes. No QFP, QFN, or BGA variants exist for this specific part number. The pinout and thermal pad soldering requirements are fully defined in Section 1.3 "Pin Assignment" of the R01UH0294EJ0200 Rev. 2.00 Hardware Manual for DF36109HV.
DF36109HV Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Package/Case:
- 100-LQFP
- Series:
- H8® H8/300H Tiny
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- H8/300H
- Core Size:
- 16-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, SCI
- Peripherals:
- PWM, WDT
- Number of I/O:
- 79
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 5K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 16x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -20°C ~ 75°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
DF36109HV FAQ
1.How can I place an order for DF36109HV through Aetrix?
Please submit a Request for Quotation (RFQ) for DF36109HV on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DF36109HV reliable?
The price and inventory of DF36109HV are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DF36109HV is usually 5 days.
3.What payment methods are accepted for DF36109HV?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DF36109HV transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DF36109HV?
DF36109HV orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DF36109HV order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DF36109HV?
For technical support, including DF36109HV datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DF36109HV requirements.
6.How does Aetrix verify that DF36109HV is sourced from the original manufacturer or authorized distributors?
All DF36109HV products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DF36109HV meets industry standards.
7.What is the process for return or replacement of DF36109HV?
All DF36109HV units undergo pre-shipment inspection (PSI). If there is an issue with DF36109HV, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DF36109HV part is unused and in its original packaging.
Return procedure for DF36109HV:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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