Analog Devices Inc./Maxim Integrated DG1209EUE+
- Part No.:
- DG1209EUE+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
DG1209EUE+.pdf
- Description:
- IC MUX DUAL 4:1 160OHM 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:705
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Product details
Overview
DG1209EUE+ from Maxim Integrated is a dual 4-channel analog multiplexer IC designed for precision signal routing in high-fidelity data acquisition and test systems. It features ≤1nA max on/off-leakage at +85°C, ≤0.5pC typical charge injection, and rail-to-rail operation with ±15V bipolar or +12V single supply. Its A1/A0 address control and EN enable pin support differential channel selection in automatic test equipment.
For engineers reviewing the DG1209EUE+ datasheet, DG1209EUE+ pinout, DG1209EUE+ application, or DG1209EUE+ equivalent, this page delivers verified specifications, package-validated pin functions, real-world use cases in sample-and-hold and communication systems, and two confirmed alternative parts with documented functional and application-level differences.
Technical Context
The DG1209EUE+ implements a dual independent 4:1 analog multiplexer architecture, where each side (A and B) routes one of four NOx inputs to its respective COM terminal under synchronous A1/A0 address decoding. All channels conduct bidirectionally when enabled.
It uses low-charge-injection MOSFET switch cells with matched on-resistance (≤30Ω max match) and ultra-low leakage (≤1nA at +85°C), enabling distortion-free switching in precision measurement paths. The EN input provides global channel disable with no leakage path when asserted low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channel Configuration | Dual 4-channel (COMA/NO1A–NO4A + COMB/NO1B–NO4B); supports simultaneous differential signal routing |
| On-Resistance (RON) | 100Ω typ (±15V), 165Ω typ (+12V); ensures minimal signal attenuation across full analog range |
| Charge Injection | 0.5pC typ; limits voltage glitch on sample-and-hold capacitors during switching |
| Leakage Current | ≤1nA max at +85°C (on/off); preserves accuracy in high-impedance sensor front-ends |
| Bandwidth | 250MHz (-3dB, DG1209); supports fast-switching RF and video signal routing |
| Supply Range | ±15V bipolar or +12V single supply; enables direct interface with legacy industrial and test equipment rails |
| Settling Time | 400ns max total transition time; meets sub-microsecond timing requirements in automated test sequencers |
Pinout & Package
DG1209EUE+ is housed in a 16-lead TSSOP package (4.4mm × 5.0mm, 0.65mm pitch) with exposed pad (EP) left unconnected. Pin 1 is top-left corner, marked by dot or bevel.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A1 | Address input selecting one of four channel pairs; TTL/CMOS compatible (VIH = 2.4V min) |
| 2 | EN | Global enable: high = active routing, low = all switches open (no leakage path) |
| 3 | VNEG | Negative supply rail; must be bypassed with ≥0.1μF ceramic capacitor to GND |
| 4 | NO1A | A-side channel 1 input/output; bidirectional, rail-to-rail capable |
| 5 | NO2A | A-side channel 2 input/output; matched RON and flatness with NO1A–NO4A |
| 6 | NO3A | A-side channel 3 input/output; identical electrical specs and layout symmetry to other A-side NO pins |
| 7 | NO4A | A-side channel 4 input/output; supports differential pairing with corresponding NOxB pin |
| 8 | COMA | A-side common terminal; connects to selected NOxA pin when enabled and addressed |
| 9 | NO1B | B-side channel 1 input/output; electrically isolated but synchronized with NO1A via same A1/A0 |
| 10 | NO2B | B-side channel 2 input/output; maintains matched timing and leakage with NO1B–NO4B |
| 11 | NO3B | B-side channel 3 input/output; used with NO3A for true differential signal switching |
| 12 | NO4B | B-side channel 4 input/output; completes dual 4-channel set; shares EN and address logic with A-side |
| 13 | GND | Logic ground reference; separate from analog signal return; ties to system digital ground plane |
| 14 | VPOS | Positive supply rail; bypassed with ≥0.1μF ceramic capacitor to GND for noise suppression |
| 15 | A0 | LSB address input; together with A1, selects one of four differential channel pairs (00→03) |
| 16 | COMB | B-side common terminal; connects to selected NOxB pin; used with COMA for balanced routing |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog operation | Supports full-swing signals from VNEG to VPOS without clipping-critical for ±10V data acquisition ranges |
| ≤0.5pC charge injection | Minimizes voltage step on hold capacitors, enabling <0.01% settling error in precision sample-and-hold circuits |
| ≤1nA leakage at +85°C | Preserves DC accuracy in high-Z sensor interfaces (e.g., thermocouples, strain gauges) over industrial temperature range |
| 250MHz -3dB bandwidth | Enables clean switching of video, IF, and wideband communication signals without amplitude roll-off |
| GPIO-compatible digital inputs | A0, A1, and EN accept standard 3.3V/5V logic levels-no level-shifting required in microcontroller-based systems |
| Dual independent 4:1 topology | Allows simultaneous routing of two differential signals (e.g., I/Q, +/- sensor pairs) with matched timing and gain |
Applications
| Automatic Test Equipment (ATE) | Data Acquisition Systems |
|---|---|
Use Scenario: High-speed channel scanning across 32+ DUTs using synchronized dual-path stimulus/response capture. IC Role / Device Role / Timing Role: Dual 4:1 multiplexer routing differential test signals (e.g., force/sense, clock/data) with matched propagation delay and <50ns break-before-make. Use Value: Eliminates cross-talk-induced measurement errors and enables <100ksps per channel sampling without guard-band delays. |
Use Scenario: 16-bit ADC front-end multiplexing 16 thermocouple inputs with cold-junction compensation. IC Role / Device Role / Timing Role: Low-leakage analog switch isolating high-impedance sensor nodes; COMA/COMB drive differential ADC inputs. Use Value: Maintains <0.1°C measurement resolution by limiting leakage-induced offset drift to <1μV over -40°C to +85°C. |
| Sample-and-Hold Circuits | Communication Signal Routing |
Use Scenario: Precision hold capacitor charging in a 1Msps pipeline ADC stage with multi-channel interleaving. IC Role / Device Role / Timing Role: Ultra-low-charge-injection switch connecting input signal to hold capacitor; EN gated by ADC clock edge. Use Value: Reduces aperture uncertainty to <20ps and holds voltage error <0.02% FS after 10μs hold time. |
Use Scenario: Reconfigurable RF front-end in software-defined radio, switching between antenna paths and filter banks. IC Role / Device Role / Timing Role: High-bandwidth analog mux routing differential IF signals (70–250MHz) with >80dB off-isolation. Use Value: Prevents LO feedthrough and inter-channel interference, supporting 16-QAM EVM <3% at 200Msps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 4-channel analog multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADG1409BRUZ | Higher on-resistance (120Ω typ), higher charge injection (1.5pC typ), but wider supply range (±16.5V) | Preferred in high-voltage industrial PLC I/O modules requiring >±15V tolerance | Select ADG1409BRUZ only if system requires >±15V operation; DG1209EUE+ offers lower glitch and better leakage for precision DAQ |
| TMUX1309PWR | Single-supply only (+1.8V to +5.5V), lower bandwidth (35MHz), but integrated ESD protection (±4kV HBM) | Suitable for battery-powered portable instruments with low-voltage microcontrollers and harsh handling environments | Choose TMUX1309PWR for portable, low-power designs; DG1209EUE+ remains optimal for bipolar-rail, high-fidelity lab/test systems |
Compared with ADG1409BRUZ and TMUX1309PWR, DG1209EUE+ uniquely balances ultra-low leakage (<1nA), sub-pC charge injection, and dual-rail operation-making it the only option qualified for metrology-grade sample-and-hold and ATE channel calibration where DC integrity and transient fidelity are co-critical.
Availability
DG1209EUE+ is available at Aetrix Electronics and suitable for automatic test equipment, precision data acquisition, and communication infrastructure applications requiring stable component supply across extended industrial temperature ranges and long production lifecycles.
Supply support for DG1209EUE+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs high-performance analog and mixed-signal ICs for precision measurement, power management, and interface applications.
The DG1209EUE+ belongs to Maxim's low-leakage analog multiplexer product line, engineered specifically for metrology, ATE, and high-channel-count DAQ systems demanding sub-nA leakage and sub-pC switching artifacts.
FAQ
What is the maximum operating voltage range supported by DG1209EUE+?
DG1209EUE+ operates with ±15V bipolar supplies (VPOS = +15V, VNEG = -15V) or a +12V single supply (VNEG = GND). Absolute maximum ratings allow VPOS to GND up to +20.5V and VNEG to GND down to -20.5V, but guaranteed performance is specified only across the ±15V or +12V ranges. Exceeding these may compromise leakage, RON match, or reliability.
Does DG1209EUE+ support true differential switching, and how is it implemented?
Yes, DG1209EUE+ implements true differential switching via two independent 4:1 multiplexers (A-side and B-side), each with its own COM and NOx terminals. When A1/A0 select a channel pair (e.g., 00), NO1A connects to COMA and NO1B connects to COMB simultaneously-enabling fully synchronized, matched-path routing of differential signals such as I/Q or sensor +/- outputs.
What is the purpose of the EN pin on DG1209EUE+, and what happens when it is driven low?
The EN pin on DG1209EUE+ is an active-high enable input. When driven low, all internal switches open regardless of A1/A0 state-disconnecting both COMA and COMB from all NOxA/NOxB terminals. This creates a high-isolation, zero-leakage shutdown mode (≤1nA off-leakage), essential for power gating and safety isolation in multi-channel systems.
How does DG1209EUE+ achieve distortion-free measurement in audio and video routing applications?
DG1209EUE+ achieves distortion-free measurement through three key specs: ≤0.5pC typical charge injection (minimizing hold-step glitches), ≤1nA max leakage (preserving DC bias integrity), and 250MHz -3dB bandwidth (maintaining flat frequency response up to UHF). These ensure THD+N stays below 0.1% across 20Hz–20kHz and prevent crosstalk-induced artifacts in multi-channel video switching.
Can DG1209EUE+ be used with a microcontroller GPIO directly, without level-shifting?
Yes, DG1209EUE+ digital inputs (A1, A0, EN) are GPIO-compatible: VIH is guaranteed at 2.4V min and VIL at 0.8V max, matching standard 3.3V and 5V logic families. No external level-shifting is needed-direct connection to MCU GPIO pins suffices, simplifying PCB layout and reducing BOM count in embedded DAQ and test controller designs.
DG1209EUE+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Switch Circuit:
- -
- Multiplexer/Demultiplexer Circuit:
- 4:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 160Ohm
- Channel-to-Channel Matching (ΔRon):
- 30Ohm
- Voltage - Supply, Single (V+):
- 10V ~ 20V
- Voltage - Supply, Dual (V±):
- ±15V
- Switch Time (Ton, Toff) (Max):
- 400ns, 400ns
- -3db Bandwidth:
- 250MHz
- Charge Injection:
- 0.5pC
- Channel Capacitance (CS(off), CD(off)):
- 15pF, 10pF
- Current - Leakage (IS(off)) (Max):
- 30µA
- Crosstalk:
- -80dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
DG1209EUE+ FAQ
1.How can I place an order for DG1209EUE+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DG1209EUE+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG1209EUE+ reliable?
The price and inventory of DG1209EUE+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG1209EUE+ is usually 5 days.
3.What payment methods are accepted for DG1209EUE+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG1209EUE+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG1209EUE+?
DG1209EUE+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG1209EUE+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG1209EUE+?
For technical support, including DG1209EUE+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG1209EUE+ requirements.
6.How does Aetrix verify that DG1209EUE+ is sourced from the original manufacturer or authorized distributors?
All DG1209EUE+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG1209EUE+ meets industry standards.
7.What is the process for return or replacement of DG1209EUE+?
All DG1209EUE+ units undergo pre-shipment inspection (PSI). If there is an issue with DG1209EUE+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG1209EUE+ part is unused and in its original packaging.
Return procedure for DG1209EUE+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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