Vishay Siliconix DG2019DN-T1-E4
- Part No.:
- DG2019DN-T1-E4
- Manufacturer:
- Vishay Siliconix
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
DG2019DN-T1-E4.pdf
- Description:
- IC SWITCH SPDT X 4 8OHM 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,607
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Product details
Overview
DG2019DN-T1-E4 from Vishay Siliconix is a low-voltage, quad SPDT analog switch in QFN-16 (3 × 3 mm) package, operating from 1.8 V to 5.5 V supply, with 6 Ω on-resistance at 2.7 V, 180 MHz bandwidth, and 1.0 V logic-high threshold enabled by dedicated VL pin. It routes audio/video signals in portable instrumentation and battery-powered systems.
For engineers reviewing the DG2019DN-T1-E4 datasheet, DG2019DN-T1-E4 pinout, DG2019DN-T1-E4 application, or DG2019DN-T1-E4 equivalent, key selection criteria include its quad SPDT topology, VL-referenced 1.0 V logic compatibility, guaranteed break-before-make timing, sub-35 ns turn-off time, and 7.5 pF off-capacitance per NC/NO terminal.
Technical Context
The DG2019DN-T1-E4 integrates four independent SPDT switches controlled by a single digital input, with a dedicated VL pin enabling 1.0 V logic-high threshold when biased at 1.5 V. All channels conduct bidirectionally with matched on-resistance (ΔRON ≤ 3 Ω) and exhibit guaranteed break-before-make operation.
It uses Vishay's low-voltage submicron CMOS process to achieve 42 ns turn-on and 16 ns turn-off times at 3 V, 180 MHz small-signal bandwidth, and <10 nA channel-off leakage across –40 °C to +85 °C. An epitaxial layer prevents latch-up, and internal clamping diodes protect terminals against overvoltage.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range | 1.8 V to 5.5 V - supports direct interface with 1.8 V, 2.7 V, 3.3 V, and 5 V logic and analog rails |
| On-Resistance (RON) | 6 Ω at V+ = 2.7 V - ensures minimal signal attenuation and voltage drop in low-level analog paths |
| Bandwidth | 180 MHz - enables high-fidelity routing of video, USB 1.1, and other wideband baseband signals |
| Logic Threshold (VINH) | 1.0 V with VL = 1.5 V - allows reliable control from ultra-low-voltage microcontrollers and baseband processors |
| Turn-Off Time (tOFF) | 16 ns typical at 3 V - supports fast channel switching in time-division multiplexed systems |
| Off-Isolation (OIRR) | –67 dB at 1 MHz - suppresses crosstalk between inactive and active signal paths |
| Charge Injection | –2.46 pC at V+ = 5.5 V - minimizes glitch-induced error in precision sampling and data acquisition |
Pinout & Package
Package: QFN-16 (3 mm × 3 mm, 0.9 mm height), thermally enhanced with exposed pad, RoHS-compliant, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 12, 11, 10, 4, 9, 5, 6, 8, 16, 15, 14, 13 | NC1–NC4, NO1–NO4, COM1–COM4, IN, VL, GND, V+ | Standard SPDT switch terminals: four independent COM/NO/NC triplets, one shared digital input (IN), dedicated VL reference, power (V+), and ground (GND) |
| 7 | Exposed Pad | Thermal and electrical ground connection - must be soldered to PCB ground plane for thermal stability and noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Quad SPDT with single control | Reduces PCB footprint and control-line count versus discrete switch arrays or dual-DPDT solutions |
| VL-referenced 1.0 V logic threshold | Enables direct drive from 1.2 V/1.5 V I/O domains without level-shifting circuitry |
| Guaranteed break-before-make | Prevents momentary short-circuit between NC and NO paths during switching - critical for signal integrity |
| Bidirectional conduction | Supports analog signal routing in either direction without polarity constraints or performance degradation |
| Epitaxial latch-up immunity | Ensures robust operation under transient overvoltage or ESD stress in portable end-equipment |
Applications
| Audio Signal Routing | Portable Instrumentation |
|---|---|
Use Scenario: Switching microphone inputs, headphone outputs, and line-level audio paths in smartphones and wearables. IC Role / Device Role / Timing Role: Quad SPDT analog switch managing multiple audio source/sink combinations under microcontroller control. Use Value: 6 Ω RON and 180 MHz bandwidth preserve THD+N and frequency response up to 20 kHz with <0.01 % distortion. |
Use Scenario: Multiplexing sensor signals (thermocouple, RTD, strain gauge) into a single ADC channel in handheld test equipment. IC Role / Device Role / Timing Role: Precision analog switch providing low-leakage (<10 nA), low-charge-injection (<2.5 pC) signal path selection. Use Value: Sub-pC charge injection and <3 Ω RON matching minimize offset drift and gain error in 16-bit+ measurement systems. |
| PCMCIA/CardBus Interface | Battery-Powered Video Switching |
Use Scenario: Isolating and routing 3.3 V I/O, card-detect, and power-enable lines in legacy PCMCIA expansion modules. IC Role / Device Role / Timing Role: Low-voltage analog/digital signal switch handling mixed-signal control and data paths with 1.8 V logic compatibility. Use Value: 1.0 V VINH threshold and 1.8–5.5 V supply range enable seamless integration with CardBus controller I/O banks. |
Use Scenario: Selecting between HDMI, MIPI DSI, and analog video outputs in portable media players and tablets. IC Role / Device Role / Timing Role: High-bandwidth SPDT switch routing baseband video signals with minimal group delay variation. Use Value: 180 MHz bandwidth and –72 dB crosstalk ensure clean RGB/YUV signal separation without ghosting or color bleed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad SPDT analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4619EUE+ | Higher RON (12 Ω at 3 V), no VL pin - requires ≥1.65 V logic-high input; 16-pin TSSOP only | Lacks VL-referenced low-threshold control; less suitable for 1.2 V/1.5 V host I/O domains | Select when board space permits TSSOP and system logic voltage ≥1.8 V |
| ADG732BRUZ | 32-channel, not quad SPDT; SPI interface instead of parallel control; 4 Ω RON at 3 V | Designed for high-channel-count, programmable routing - not drop-in replacement for single-control quad SPDT | Choose only for scalable, software-configurable multiplexing where pin count and control protocol allow |
Compared with MAX4619EUE+ and ADG732BRUZ, the DG2019DN-T1-E4 uniquely combines single-pin parallel control, VL-referenced 1.0 V logic compatibility, and QFN-16 packaging - enabling compact, low-voltage, low-glitch analog routing unattainable with either alternative.
Availability
DG2019DN-T1-E4 is available at Aetrix Electronics and suitable for cellular phones, portable instrumentation, PCMCIA cards, battery-operated systems, and audio/video signal routing requiring stable component supply and long-term production continuity.
Supply support for DG2019DN-T1-E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay Siliconix is a global leader in discrete semiconductors and passive components, specializing in high-performance MOSFETs, diodes, optoelectronics, and analog switches engineered for efficiency, reliability, and miniaturization.
The DG2019DN-T1-E4 belongs to Vishay's low-voltage analog switch family, designed specifically for space-constrained, battery-powered mixed-signal applications demanding ultra-low logic thresholds, fast switching, and rail-to-rail analog signal handling.
FAQ
What is the function of the VL pin on the DG2019DN-T1-E4?
The VL pin on the DG2019DN-T1-E4 sets the reference voltage for the logic input threshold. When biased at 1.5 V, it enables a 1.0 V logic-high recognition level (VINH), allowing direct interfacing with 1.2 V or 1.5 V microcontroller I/O without external level shifters. This feature is integral to the DG2019DN-T1-E4's low-voltage system integration capability and is not present in the DG2018DN variant.
Does the DG2019DN-T1-E4 support bidirectional analog signal routing?
Yes, the DG2019DN-T1-E4 supports fully bidirectional analog signal routing across all COM/NO/NC paths. Its CMOS architecture ensures symmetrical on-resistance and capacitance regardless of signal direction, making it suitable for both source-to-load and load-to-source configurations in precision analog circuits. This behavior is confirmed in the device's functional description and electrical specifications for RON and CNO(on)/CNC(on).
What is the maximum analog signal voltage range supported by the DG2019DN-T1-E4?
The DG2019DN-T1-E4 supports analog signal voltages from 0 V to V+, where V+ ranges from 1.8 V to 5.5 V. Absolute maximum ratings permit signals up to (V+ + 0.3 V) on NC, NO, or COM pins, limited by internal clamping diodes. Operation outside 0 V to V+ risks increased leakage or distortion and is not characterized in the datasheet for the DG2019DN-T1-E4.
Is break-before-make timing guaranteed for all channels of the DG2019DN-T1-E4?
Yes, break-before-make timing is guaranteed for all four SPDT sections of the DG2019DN-T1-E4. The datasheet explicitly states "Brake-before-make is guaranteed for all SPDT's" and specifies a maximum break-before-make interval (td) of 1 ns under defined test conditions. This guarantee applies across the full –40 °C to +85 °C temperature range and is a design feature of the DG2019DN-T1-E4's internal control architecture.
What package type and dimensions does the DG2019DN-T1-E4 use?
The DG2019DN-T1-E4 uses a QFN-16 package measuring 3.0 mm × 3.0 mm with 0.9 mm maximum height and an exposed thermal pad. Pin pitch is 0.5 mm, and the package complies with JEDEC MO-220 standards. This compact, thermally efficient footprint is specified in Vishay document 72208 and is shared across the DG2018/DG2019 family, including the DG2019DN-T1-E4 ordering variant.
DG2019DN-T1-E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay Siliconix
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 4
- On-State Resistance (Max):
- 8Ohm
- Channel-to-Channel Matching (ΔRon):
- 600mOhm
- Voltage - Supply, Single (V+):
- 1.8V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 48ns, 33ns
- -3db Bandwidth:
- 180MHz
- Charge Injection:
- -2.46pC
- Channel Capacitance (CS(off), CD(off)):
- 7.5pF
- Current - Leakage (IS(off)) (Max):
- 1nA
- Crosstalk:
- -72dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
DG2019DN-T1-E4 FAQ
1.How can I place an order for DG2019DN-T1-E4 through Aetrix?
Please submit a Request for Quotation (RFQ) for DG2019DN-T1-E4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DG2019DN-T1-E4 reliable?
The price and inventory of DG2019DN-T1-E4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DG2019DN-T1-E4 is usually 5 days.
3.What payment methods are accepted for DG2019DN-T1-E4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DG2019DN-T1-E4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DG2019DN-T1-E4?
DG2019DN-T1-E4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DG2019DN-T1-E4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DG2019DN-T1-E4?
For technical support, including DG2019DN-T1-E4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DG2019DN-T1-E4 requirements.
6.How does Aetrix verify that DG2019DN-T1-E4 is sourced from the original manufacturer or authorized distributors?
All DG2019DN-T1-E4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DG2019DN-T1-E4 meets industry standards.
7.What is the process for return or replacement of DG2019DN-T1-E4?
All DG2019DN-T1-E4 units undergo pre-shipment inspection (PSI). If there is an issue with DG2019DN-T1-E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DG2019DN-T1-E4 part is unused and in its original packaging.
Return procedure for DG2019DN-T1-E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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